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公开(公告)号：US12132158B2
公开(公告)日：2024-10-29
申请号：US17432429
申请日：2020-02-13
CPC分类号： H01L33/62 , H01L33/005 , H01L33/22 , H01L33/44 , H01L33/58 , H01L2933/0025 , H01L2933/0058 , H01L2933/0066
摘要： In an embodiment an optoelectronic component includes a first joining partner including an LED chip with a structured light-emitting surface and a compensation layer applied to the light-emitting surface, wherein the compensation layer has a surface facing away from the light-emitting surface and spaced apart from the light-emitting surface, and wherein the surface forms a first connecting surface, a second joining partner having a second connecting surface, the first and second connecting surfaces being arranged such that they face each other and a bonding layer made of a film of low-melting glass having a layer thickness of not more than 1 μm, wherein the bonding layer bonds the first and second connecting surfaces together, wherein the structure of the light-emitting surface is embedded in the compensation layer, and wherein the first and second connecting surfaces are smooth such that their surface roughness, expressed as center-line roughness, is less than or equal to 50 nm.
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公开(公告)号：US20220271202A1
公开(公告)日：2022-08-25
申请号：US17633051
申请日：2020-09-03
发明人： Ivar Tangring
摘要： In an embodiment an optoelectronic component includes a carrier with a mounting area, an optoelectronic semiconductor chip, a dielectric protective layer and a dielectric encapsulation, wherein the protective layer is directly located at the mounting area in a chip mounting region, wherein the semiconductor chip is located at the protective layer in the chip mounting region and is electrically conductively connected with the carrier, wherein the encapsulation is directly located at the mounting area in a region adjacent to the chip mounting region and is directly located at the protective layer in an overlap region, and wherein the encapsulation is arranged exclusively in the region adjacent to the semiconductor chip.
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公开(公告)号：US11923487B2
公开(公告)日：2024-03-05
申请号：US17296378
申请日：2019-12-03
发明人： Gregory Bellynck , Ivar Tangring
CPC分类号： H01L33/56 , H01L33/60 , H01L33/507 , H01L2933/005 , H01L2933/0041 , H01L2933/0058
摘要： In an embodiment a method includes providing a carrier with an optoelectronic semiconductor chip-component arranged on a top side of the carrier, arranging a first potting material on the top side of the carrier, arranging a second potting material on the first potting material, wherein the second potting material comprises a higher density than the first potting material, wherein a top side of the optoelectronic semiconductor chip-component is covered by neither the first potting material nor the second potting material and allowing a force to act on the first potting material and the second potting material such that the second potting material migrates in a direction toward the top side of the carrier.
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公开(公告)号：US20220190222A1
公开(公告)日：2022-06-16
申请号：US17442648
申请日：2020-03-23
发明人： Ivar Tangring
摘要： An optoelectronic semiconductor device may include a first semiconductor layer of a first conductivity type and a second semiconductor layer of a second conductivity type, a dielectric layer, and a transparent conductive layer. The first and second semiconductor layers may be stacked one on top of the other to form a layer stack, and a first main surface of the first semiconductor layer may be roughened. The dielectric layer may be arranged over the first main surface of the first semiconductor layer and may have a planar first main surface on a side facing away from the first semiconductor layer. The transparent conductive layer may be arranged over the side of the dielectric layer facing away from the first semiconductor layer.
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公开(公告)号：US20200013920A1
公开(公告)日：2020-01-09
申请号：US16489678
申请日：2018-02-16
发明人： Ivar Tangring
IPC分类号： H01L33/00 , H01L33/60 , H01L23/00 , H01L25/075 , H01L27/15
摘要： A method for manufacturing light emitting diodes and a light emitting diode are disclosed. In an embodiment a method includes providing a light emitting diode chip with a growth substrate and with a semiconductor layer sequence for generating radiation, soldering chip contact surfaces located on a chip underside of the semiconductor layer sequence facing away from the growth substrate to carrier contact surfaces of a carrier, applying a liquid connector transparent to the radiation to a substrate upper side of the growth substrate facing away from the semiconductor layer sequence, fastening a fluorescent body to the substrate upper side, the connector being partially displaced by the fluorescent body from the substrate upper side so that chip side faces are predominantly covered by the connector and generating a reflector on outer faces of the connector facing away from the light emitting diode chip on the chip side faces, the outer faces pointing in a direction away from the carrier.
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6.发明申请公开(公告)号：US20190019783A1
公开(公告)日：2019-01-17
申请号：US16069204
申请日：2017-01-12
发明人： Ivar Tangring
IPC分类号： H01L25/075 , H01L33/54 , H01L33/50 , H01L33/58 , H01L33/60
摘要： A method produces an optoelectronic lighting device. The device efficiently increases a decoupling of electromagnetic radiation from a volume emitter LED chip. This is achieved in that, a frame made of an optical material is provided on side surfaces of the volume emitter LED chip, wherein the frame has a curved section. Light decoupled via the side surfaces of the volume emitter LED chip is thereby coupled into the frame, and can be decoupled again via same or reflected, for example, on a reflective material applied to the frame.
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公开(公告)号：US20220320403A1
公开(公告)日：2022-10-06
申请号：US17634206
申请日：2020-07-30
发明人： Ivar Tangring
摘要： In an embodiment a component includes a semiconductor body, a converter layer, a filling layer and an intermediate layer arranged in a vertical direction between the semiconductor body and the converter layer, wherein the semiconductor body has a surface which faces the converter layer, is structured and has vertical recesses, wherein the vertical recesses are filled with a material of the filling layer that has a higher thermal conductivity than silicone, wherein the intermediate layer or the semiconductor body has a higher mechanical hardness than the filling layer, and wherein the structured surface of the semiconductor body has local elevations and local recesses, the structured surface including exclusively the surface of an n-type or a p-type semiconductor layer.
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公开(公告)号：US20200251624A1
公开(公告)日：2020-08-06
申请号：US16640033
申请日：2018-08-16
发明人： Ivar Tangring , Gregory Bellynck
摘要： In an embodiment a method for producing a semiconductor device includes providing a carrier with a semiconductor component arranged on the carrier, providing a layer arrangement on the carrier, the layer arrangement adjoining the semiconductor component and comprising a first and a second flowable layer, wherein the first layer is formed on the carrier and then the second layer is formed on the first layer, wherein the first layer comprises particles, wherein a density of the first layer is greater than a density of the second layer, and wherein a lateral wetting of the semiconductor component with the first layer occurs such that the first layer comprises a first configuration comprising a curved layer surface laterally with respect to the semiconductor component, and centrifuging the carrier such that the first layer comprises a second configuration as a result, wherein the first layer cannot return to the first configuration since the second layer is arranged on the first layer.
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公开(公告)号：US10217896B2
公开(公告)日：2019-02-26
申请号：US15532236
申请日：2015-11-25
发明人： Andreas Rudolph , Petrus Sundgren , Ivar Tangring
摘要： An optoelectronic semiconductor chip is disclosed. In an embodiment the optoelectronic semiconductor chip includes a p-type semiconductor region, an n-type semiconductor region, and an active layer arranged between the p-type semiconductor region and the n-type semiconductor region. The active layer is designed as a multiple quantum well structure, wherein the multiple quantum well structure has a first region of alternating first quantum well layers and first barrier layers and a second region having at least one second quantum well layer and at least one second barrier layer. The at least one second quantum well layer has an electronic band gap (EQW2) that is less than the electronic band gap (EQW1) of the first quantum well layers, and the at least one second barrier layer has an electronic band gap (EB2) that is greater than the electronic band gap (EB1) of the first barrier layers.
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10.发明授权公开(公告)号：US10121936B2
公开(公告)日：2018-11-06
申请号：US15645813
申请日：2017-07-10
发明人： Ivar Tangring , Felix Ernst
摘要： An optoelectronic semiconductor chip including a multi-quantum well including at least one high barrier layer is disclosed. In an embodiment, the chip includes a p-type semiconductor region, an n-type semiconductor region and an active layer suitable for emission of radiation arranged between the p-type region and the n-type region, wherein the active layer is in the form of a multiple quantum well structure. The multiple quantum well structure has a plurality of alternating quantum well layers and barrier layers, wherein a barrier layer arranged closer to the p-type region than to the n-type region is a high barrier layer having an electronic band gap Ehb that is larger than electronic band gaps Eb of other barrier layers, and wherein a quantum well layer that adjoins the high barrier layer on a side facing towards the p-type region has a thickness that is greater than thicknesses of other quantum well layers.
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