公开(公告)号：US07956781B2

公开(公告)日：2011-06-07

申请号：US12445029

申请日：2006-10-13

申请人： Omid Oliaei ,  Alan Bannon ,  Anthony Dunne ,  Matthew R. Miller ,  Daniel O'Hare

发明人： Omid Oliaei ,  Alan Bannon ,  Anthony Dunne ,  Matthew R. Miller ,  Daniel O'Hare

IPC分类号： H03M3/00

CPC分类号： H03M3/392 ,  H03M3/40

摘要： An analogue-to-digital converter apparatus comprises a first integrator coupled to a second integrator. The first and second integrators are coupled so as to provide a complex pole. The first integrator is selectively electrically decoupleable from the second integrator, thereby removing the complex pole.

摘要翻译： 模数转换器装置包括耦合到第二积分器的第一积分器。 第一和第二积分器耦合以提供复极。 第一积分器选择性地与第二积分器电可去耦，从而去除复极。

公开(公告)号：US20100019944A1

公开(公告)日：2010-01-28

申请号：US12445029

申请日：2006-10-13

申请人： Omid Oliaei ,  Alan Bannon ,  Anthony Dunne ,  Matthew R. Miller ,  Daniel O'Hare

发明人： Omid Oliaei ,  Alan Bannon ,  Anthony Dunne ,  Matthew R. Miller ,  Daniel O'Hare

IPC分类号： H03M1/12 ,  H03M3/00

CPC分类号： H03M3/392 ,  H03M3/40

摘要： An analogue-to-digital converter apparatus comprises a first integrator coupled to a second integrator. The first and second integrators are coupled so as to provide a complex pole. The first integrator is selectively electrically decoupleable from the second integrator, thereby removing the complex pole.

摘要翻译： 模数转换器装置包括耦合到第二积分器的第一积分器。 第一和第二积分器耦合以提供复极。 第一积分器选择性地与第二积分器电可去耦，从而去除复极。

公开(公告)号：US06697001B1

公开(公告)日：2004-02-24

申请号：US10324684

申请日：2002-12-19

申请人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

IPC分类号： H03M302

CPC分类号： H03M3/356 ,  H03M3/43 ,  H03M3/456

摘要： Systems and methods are described for a continuous-time sigma-delta modulator with discrete time common-mode feedback. The method includes calculating an integrator input signal as a difference between an input signal and a modulation feedback signal, continuous time integrating the integrator input signal to produce an integrator output signal having a common mode voltage, determining the common mode voltage of the integrator output signal using a discrete-time process, determining an integrator feedback signal as a function of the common-mode voltage and feeding back the feedback signal to the integrator in order to maintain the common mode voltage at a substantially constant value, sampling and quantizing the integrator output signal to produce a sigma-delta modulated output signal and converting the sigma-delta modulated output signal from a digital signal to an analog signal, to produce the modulation feedback signal.

摘要翻译： 对具有离散时间共模反馈的连续时间Σ-Δ调制器描述了系统和方法。 该方法包括：计算积分器输入信号作为输入信号和调制反馈信号之间的差值，连续时间积分积分器输入信号以产生具有共模电压的积分器输出信号，确定积分器输出信号的共模电压 使用离散时间过程，确定作为共模电压的函数的积分器反馈信号并将反馈信号反馈到积分器，以便将共模电压保持在基本恒定的值，对积分器输出进行采样和量化 信号以产生Σ-Δ调制输出信号，并将Σ-Δ调制输出信号从数字信号转换成模拟信号，以产生调制反馈信号。

公开(公告)号：US06693572B1

公开(公告)日：2004-02-17

申请号：US10358055

申请日：2003-02-04

申请人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

发明人： Omid Oliaei ,  Matthew R. Miller ,  Patrick L. Rakers

IPC分类号： H03M300

CPC分类号： H03M3/382 ,  H03M3/43 ,  H03M3/456

摘要： Systems and methods are described for a digital tuning scheme for continuous-time sigma-delta modulation. The method includes integrating a voltage from a voltage source using a discrete-time integrator to produce a discrete-time integrator output, continuous-time integrating a current from a controllable current source to produce a continuous-time integrator output, quantizing the difference between the continuous-time integrator output and the discrete-time integrator output to produce a quantizer output, controlling a polarity of the controllable current source with the quantizer output, counting the quantizer output to produce a feedback signal, and tuning the controllable current source as a function of the feedback signal.

摘要翻译： 描述了用于连续时间Σ-Δ调制的数字调谐方案的系统和方法。 该方法包括使用离散时间积分器积分来自电压源的电压以产生离散时间积分器输出，将来自可控电流源的电流连续时间积分以产生连续时间积分器输出，量化 连续时间积分器输出和离散时间积分器输出以产生量化器输出，通过量化器输出来控制可控电流源的极性，对量化器输出进行计数以产生反馈信号，以及调节可控电流源作为一个功能 的反馈信号。

公开(公告)号：US20120144480A1

公开(公告)日：2012-06-07

申请号：US12958668

申请日：2010-12-02

申请人： Matthew R. Miller ,  Kenneth D. Johnson

发明人： Matthew R. Miller ,  Kenneth D. Johnson

IPC分类号： G06F21/00

CPC分类号： G06F21/6218 ,  G06F2221/2143

摘要： The subject disclosure is directed towards preventing the exploitation by malicious code of object state corruption vulnerabilities, such as use-after-free vulnerabilities. An object class is configured with a secret cookie in a virtual function table of the object, e.g., inserted at compile time. An instrumentation check inserted in the program code evaluates the secret cookie to determine whether the object state has been corrupted before object access (e.g., a call to one of the object's methods) is allowed. If corrupted, access to the object is prevented by the instrumentation check. Another instrumentation check may be used to determine whether the object's virtual table pointer points to a location outside of the module that contains the legitimate virtual function table; if so, object access is prevented.

摘要翻译： 该主题披露旨在防止恶意代码利用对象状态破坏漏洞（例如使用后免费漏洞）。 对象类在对象的虚拟功能表中配置有秘密cookie，例如在编译时插入。 插入程序代码中的检测检查将评估秘密cookie，以确定对象状态是否在对象访问之前已被破坏（例如，对对象的方法之一的调用）。 如果损坏，仪器检查会阻止对对象的访问。 可以使用另一种仪器检查来确定对象的虚拟表指针是否指向包含合法虚拟功能表的模块之外的位置; 如果是这样，则可以防止对象访问。

公开(公告)号：US20100109767A1

公开(公告)日：2010-05-06

申请号：US12262127

申请日：2008-10-30

申请人： Pallab Midya ,  Matthew R. Miller ,  William J. Roeckner

发明人： Pallab Midya ,  Matthew R. Miller ,  William J. Roeckner

IPC分类号： H03F3/38 ,  H03F3/217

CPC分类号： H03F3/217

摘要： A switching amplifier drives a load or audio transducer. A digital integral noise shaping circuit converts a digital input such as audio content to an output digital pulse width modulated signal using an integrator. The integrator integrates the digital input, a variable frequency reference pulse width modulated signal and an inverse of the output digital pulse width modulated signal. A half bridge amplifier receives the output digital pulse width modulated signal and drives the load or audio transducer. A variable frequency generator generates the variable frequency reference pulse width modulated signal with an approximately equal duty ratio or alternatively varies the variable frequency pulse width modulated signal above and below about a fifty percent duty ratio.

摘要翻译： 开关放大器驱动负载或音频传感器。 数字积分噪声整形电路使用积分器将诸如音频内容的数字输入转换为输出数字脉宽调制信号。 积分器将数字输入，可变频率参考脉冲宽度调制信号和输出数字脉宽调制信号的反相相结合。 半桥放大器接收输出数字脉宽调制信号并驱动负载或音频传感器。 可变频率发生器以大致相等的占空比产生可变频率参考脉冲宽度调制信号，或者可选地改变高于和低于约百分之五十占空比的可变频率脉宽调制信号。

公开(公告)号：US06411232B1

公开(公告)日：2002-06-25

申请号：US09409779

申请日：1999-09-30

申请人： Matthew R. Miller ,  Craig Petrie ,  John Rinderknecht

发明人： Matthew R. Miller ,  Craig Petrie ,  John Rinderknecht

IPC分类号： H03M110

CPC分类号： H03M3/386 ,  H03M3/388 ,  H03M3/424

摘要： A converter continuously converts an input signal (110) to an output signal (112) even during correction and compensation. A primary converter (124) converts the signal along a forward primary path (104). A feedback converter (140) along a feedback path (106) outputs a feedback signal (116). A reference device (136) employs reference indicator (134) to provide a digital reference signal (135). A selection device (132) passes the digital reference signal (135) to an element (204) of the feedback converter (140) for outputting reference portion (208) of the feedback signal (116). The passing of the digital reference signal (135) to the element (204) is contemporaneous with the converting of the input signal (110) to the output signal (112). The evaluator (142) determines a conversion characteristic of the element (204) by employing a characteristic of the reference indicator (134).

摘要翻译： 即使在校正和补偿期间，A转换器也将输入信号（110）连续地转换为输出信号（112）。 主转换器（124）沿着前向主路径（104）转换信号。 沿反馈路径（106）的反馈转换器（140）输出反馈信号（116）。 参考装置（136）使用参考指示器（134）来提供数字参考信号（135）。 选择装置（132）将数字参考信号（135）传递到反馈转换器（140）的元件（204），用于输出反馈信号（116）的参考部分（208）。 将数字参考信号（135）传递到元件（204）同时与输入信号（110）转换为输出信号（112）。 评估器（142）通过采用参考指示符（134）的特性来确定元件（204）的转换特性。

公开(公告)号：US08683583B2

公开(公告)日：2014-03-25

申请号：US12958668

申请日：2010-12-02

申请人： Matthew R. Miller ,  Kenneth D. Johnson ,  Timothy William Burrell

发明人： Matthew R. Miller ,  Kenneth D. Johnson ,  Timothy William Burrell

IPC分类号： G06F21/00

CPC分类号： G06F21/6218 ,  G06F2221/2143

摘要： The subject disclosure is directed towards preventing the exploitation by malicious code of object state corruption vulnerabilities, such as use-after-free vulnerabilities. An object class is configured with a secret cookie in a virtual function table of the object, e.g., inserted at compile time. An instrumentation check inserted in the program code evaluates the secret cookie to determine whether the object state has been corrupted before object access (e.g., a call to one of the object's methods) is allowed. If corrupted, access to the object is prevented by the instrumentation check. Another instrumentation check may be used to determine whether the object's virtual table pointer points to a location outside of the module that contains the legitimate virtual function table; if so, object access is prevented.

摘要翻译： 该主题披露旨在防止恶意代码利用对象状态破坏漏洞（例如使用后免费漏洞）。 对象类在对象的虚拟功能表中配置有秘密cookie，例如在编译时插入。 插入程序代码中的检测检查将评估秘密cookie，以确定对象状态是否在对象访问之前已被破坏（例如，对对象的方法之一的调用）。 如果损坏，仪器检查会阻止对对象的访问。 可以使用另一种仪器检查来确定对象的虚拟表指针是否指向包含合法虚拟功能表的模块之外的位置; 如果是这样，则可以防止对象访问。

公开(公告)号：US06930554B2

公开(公告)日：2005-08-16

申请号：US10623047

申请日：2003-07-18

申请人： Jyoti Mondal ,  Neil L. Calanca ,  Matthew R. Miller

发明人： Jyoti Mondal ,  Neil L. Calanca ,  Matthew R. Miller

IPC分类号： H03F1/22 ,  H03F3/45 ,  H03G3/30 ,  H03G3/10

CPC分类号： H03F1/223 ,  H03F1/22 ,  H03F3/45089 ,  H03F2200/294 ,  H03F2200/372 ,  H03F2200/411 ,  H03F2203/45481 ,  H03G3/3052 ,  H03G3/3057

摘要： A variable gain control amplifier (10) and method provides a substantially constant input impedance and output impedance, and provides a substantially constant noise figure and third order harmonic. The variable gain control amplifier (10) includes an amplifier stage including at least a first intermediate fixed gain stage (22) operative to produce a first intermediate signal (30) in response to the input signal (20). The variable gain control amplifier (10) further includes at least a second intermediate fixed gain stage (24) operative to produce an output signal (18) in response to the first intermediate signal (30). A feedback circuit (16) is operative to produce a gain control signal (32) in response to the output signal (18). A gain control circuit (26) is coupled to the at least first intermediate fixed gain stage (22) and the second intermediate fixed gain stage (24), and receives the gain control signal (32) to control an amplitude of the intermediate signal (30).

摘要翻译： 可变增益控制放大器（10）和方法提供基本恒定的输入阻抗和输出阻抗，并且提供基本上恒定的噪声系数和三阶谐波。 可变增益控制放大器（10）包括放大器级，至少包括第一中间固定增益级（22），用于响应输入信号（20）产生第一中间信号（30）。 可变增益控制放大器（10）还包括至少第二中间固定增益级（24），其响应于第一中间信号（30）而产生输出信号（18）。 反馈电路（16）用于响应于输出信号（18）产生增益控制信号（32）。 增益控制电路（26）耦合到至少第一中间固定增益级（22）和第二中间固定增益级（24），并且接收增益控制信号（32）以控制中间信号 30）。

公开(公告)号：US06750704B1

公开(公告)日：2004-06-15

申请号：US10340335

申请日：2003-01-09

申请人： Lawrence Edwin Connell ,  Craig S. Petrie ,  Matthew R. Miller

发明人： Lawrence Edwin Connell ,  Craig S. Petrie ,  Matthew R. Miller

IPC分类号： H03F102

CPC分类号： H03F3/45753 ,  H03F2200/331

摘要： A differential amplifier comprises a differential input stage including first and second input devices and has first and second input electrodes and first and second output terminals. A differential load stage includes first and second load devices having first and second control electrodes respectively. The load stage is coupled to the differential input stage and to the first and second output terminals. First and second separate capacitive biasing networks are coupled to the first and second output terminals and respectively to the first and second control electrodes. During an offset-cancellation phase, the input electrodes are coupled to a common voltage. During an amplification phase, a differential input signal is applied to the input electrodes.

摘要翻译： 差分放大器包括具有第一和第二输入装置的差分输入级，并具有第一和第二输入电极以及第一和第二输出端子。 差分负载级包括分别具有第一和第二控制电极的第一和第二负载装置。 负载级耦合到差分输入级以及第一和第二输出端。 第一和第二分离电容偏置网络耦合到第一和第二输出端子，并分别耦合到第一和第二控制电极。 在偏移消除阶段期间，输入电极耦合到公共电压。 在放大阶段期间，差分输入信号被施加到输入电极。