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    Sub-second annealing processes for semiconductor devices
    3.
    发明授权
    Sub-second annealing processes for semiconductor devices 有权
    半导体器件的次秒退火工艺

    公开(公告)号：US07892971B2

    公开(公告)日：2011-02-22

    申请号：US12164560

    申请日：2008-06-30

    申请人： Jack Hwang ,  Sridhar Govindaraju ,  Karson Knutson ,  Harold Kennel ,  Aravind Killampalli

    发明人： Jack Hwang ,  Sridhar Govindaraju ,  Karson Knutson ,  Harold Kennel ,  Aravind Killampalli

    IPC分类号： H01L21/44

    CPC分类号： H01L21/324 ,  H01L21/28518 ,  H01L29/665

    摘要： An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described.

    摘要翻译： 描述用于半导体制造的退火方法和装置。 该方法和装置允许可以跨越热预算的退火，并且可以针对具体过程及其对应的激活能量进行定制。 在一些情况下，退火方法跨越约1毫秒至约1秒的时间范围。 该退火方法的一个实例包括二次退火方法，其中在自杀化处理期间实现镍管形成的减少。 在一些情况下，该方法和装置将亚秒级退火的快速加热速率与导热基板相结合，为硅晶片提供快速冷却。 因此，次秒退火方法的热预算可以跨越从常规RTP退火到闪光退火工艺（包括退火的持续时间，以及峰值温度）的范围。 描述其他实施例。

    SUB-SECOND ANNEALING PROCESSES FOR SEMICONDUCTOR DEVICES
    5.
    发明申请
    SUB-SECOND ANNEALING PROCESSES FOR SEMICONDUCTOR DEVICES 有权
    用于半导体器件的次二次退火工艺

    公开(公告)号：US20090325392A1

    公开(公告)日：2009-12-31

    申请号：US12164560

    申请日：2008-06-30

    申请人： Jack Hwang ,  Sridhar Govindaraju ,  Karson Knutson ,  Harold Kennel ,  Aravind Killampalli

    发明人： Jack Hwang ,  Sridhar Govindaraju ,  Karson Knutson ,  Harold Kennel ,  Aravind Killampalli

    IPC分类号： H01L21/26

    CPC分类号： H01L21/324 ,  H01L21/28518 ,  H01L29/665

    摘要： An annealing method and apparatus for semiconductor manufacturing is described. The method and apparatus allows an anneal that can span a thermal budget and be tailored to a specific process and its corresponding activation energy. In some cases, the annealing method spans a timeframe from about 1 millisecond to about 1 second. An example for this annealing method includes a sub-second anneal method where a reduction in the formation of nickel pipes is achieved during salicide processing. In some cases, the method and apparatus combine the rapid heating rate of a sub-second anneal with a thermally conductive substrate to provide quick cooling for a silicon wafer. Thus, the thermal budget of the sub-second anneal methods may span the range from conventional RTP anneals to flash annealing processes (including duration of the anneal, as well as peak temperature). Other embodiments are described.

    摘要翻译： 描述用于半导体制造的退火方法和装置。 该方法和装置允许可以跨越热预算的退火，并且可以针对具体过程及其对应的激活能量进行定制。 在一些情况下，退火方法跨越约1毫秒至约1秒的时间范围。 该退火方法的一个实例包括二次退火方法，其中在自杀化处理期间实现镍管形成的减少。 在一些情况下，该方法和装置将亚秒级退火的快速加热速率与导热基板相结合，为硅晶片提供快速冷却。 因此，次秒退火方法的热预算可以跨越从常规RTP退火到闪光退火工艺（包括退火的持续时间，以及峰值温度）的范围。 描述其他实施例。

    VERTICAL SEMICONDUCTOR WAFER CARRIER
    6.
    发明申请
    VERTICAL SEMICONDUCTOR WAFER CARRIER 审中-公开
    垂直半导体波导载体

    公开(公告)号：US20090071918A1

    公开(公告)日：2009-03-19

    申请号：US11857398

    申请日：2007-09-18

    申请人： Panchapakesan Ramanarayanan ,  Karson Knutson ,  Peter G. Tolchinsky ,  Christopher Parker

    发明人： Panchapakesan Ramanarayanan ,  Karson Knutson ,  Peter G. Tolchinsky ,  Christopher Parker

    IPC分类号： H01L21/00

    CPC分类号： H01L21/67309 ,  H01L21/6732

    摘要： A vertical semiconductor wafer carrier comprises a circular base, a first wafer support rod mounted at a first position proximate a perimeter of the circular base, a second wafer support rod mounted at a second position proximate the perimeter of the circular base, wherein an angle θ12 formed between the first position and the second position relative to a center of the circular base is around 20°, a third wafer support rod mounted at a third position proximate the perimeter of the circular base, and a fourth wafer support rod mounted at a fourth position proximate the perimeter of the circular base, wherein an angle θ34 formed between the third position and the fourth position relative to the center of the circular base is around 20°, and wherein an angle θ14 formed between the first and fourth positions relative to the center of the circular base is around 180°.

    摘要翻译： 垂直半导体晶片载体包括圆形基底，安装在靠近圆形基底的周边的第一位置处的第一晶片支撑杆，安装在靠近圆形基底的周边的第二位置处的第二晶片支撑杆，其中角度θ12 形成在第一位置和第二位置之间相对于圆形基座的中心约为20°，第三晶片支撑杆安装在靠近圆形基座周边的第三位置，第四晶片支撑杆安装在第四位置 位于邻近圆形底座的周边的位置，其中形成在第三位置和第四位置之间的相对于圆形底座的中心的角度θ34大约为20°，并且其中形成在第一和第四位置之间的角度θ14相对于 圆形基座的中心约为180°。

    Use of active temperature control to provide emmisivity independent wafer temperature
    10.
    发明申请
    Use of active temperature control to provide emmisivity independent wafer temperature 审中-公开
    使用主动温度控制提供独立的晶片温度

    公开(公告)号：US20060004493A1

    公开(公告)日：2006-01-05

    申请号：US10882894

    申请日：2004-06-30

    申请人： Jack Hwang ,  Robert James ,  Eric Lambert ,  Jonathan Leonard ,  Richard Brindos ,  Karson Knutson ,  Mark Armstrong ,  Justin Sandford

    发明人： Jack Hwang ,  Robert James ,  Eric Lambert ,  Jonathan Leonard ,  Richard Brindos ,  Karson Knutson ,  Mark Armstrong ,  Justin Sandford

    IPC分类号： G05D23/00

    CPC分类号： G05D23/27 ,  G05D23/1928

    摘要： Embodiments relate to a substrate or wafer edge support having an emmisivity greater than that of a silicon wafer, where the edge support is for supporting a wafer during processing to form circuit devices on or in the wafer. Embodiments also include temperature sensors, heat conducting gas jets, and photonic energy can be directed to sense and control the temperature of the edge support and/or wafer edge during annealing to reduce temperature roll-off or roll-up at the edge as compared to the center of the wafer. Specifically, use of an edge support having an emmisivity greater than or equal to that of the wafer during processing allows helium gas jets directed at the edge support and/or wafer edge to reduce temperature roll-up at the edge during annealing. Because wafers from different processes and anneal locations may all have different emmisivities, use of the feedback loop will enable one edge ring to support the uniform anneal of wafers with a range of different emmisivities.

    摘要翻译： 实施例涉及具有大于硅晶片的发射率的衬底或晶片边缘支撑件，其中边缘支撑件用于在处理期间支撑晶片以在晶片上或晶片中形成电路器件。 实施例还包括温度传感器，导热气体射流和光子能量可以被引导以在退火期间感测和控制边缘支撑件和/或晶片边缘的温度，以减少边缘处的温度滚降或卷绕，与 晶圆的中心。 具体地说，在加工过程中使用具有大于或等于晶片的发射率的边缘支撑件允许指向边缘支撑和/或晶片边缘的氦气射流减少退火期间在边缘处的温度上升。 因为来自不同工艺和退火位置的晶圆都可能具有不同的灵敏度，所以使用反馈回路将使得一个边缘环能够支持具有一定范围的不同灵敏度的晶片的均匀退火。