公开(公告)号：US06662173B1

公开(公告)日：2003-12-09

申请号：US09224377

申请日：1998-12-31

Applicant: Per Hammarlund ,  Robert Greiner

Inventor： Per Hammarlund ,  Robert Greiner

IPC: G06F1730

CPC classification number: G06F12/0804 ,  G06F12/0842 ,  G06F12/123 ,  Y10S707/99932

Abstract: A resource including a plurality of elements, such as a cache memory having a plurality of addressable blocks or ways, is shared between two or more components based on the operation of an access controller. The access controller, controls which of the elements are accessed exclusively by a component and which are shared by two or more components. In one embodiment, the components include the execution of instructions in first and second threads in a multi-threaded processor environment. To prevent one thread from dominating the cache memory, a first mask value is provided for each thread. The access of the components to the cache memory is controlled by the first mask values. For example, the mask values can be selected so as to prevent a thread from accessing one or more of the ways in the cache (e.g., to evict, erase, delete, etc. a particular way in the cache). Also, the mask values can be set to allow certain of the ways in the cache to be shared between threads.

Abstract translation: 基于访问控制器的操作，包括多个元素的资源，诸如具有多个可寻址块或方式的高速缓冲存储器，在两个或更多个组件之间共享。 访问控制器控制哪些元素由组件专门访问，并由两个或多个组件共享。 在一个实施例中，组件包括在多线程处理器环境中的第一和第二线程中执行指令。 为了防止一个线程控制高速缓冲存储器，为每个线程提供了第一个掩码值。 组件对高速缓冲存储器的访问由第一掩码值控制。 例如，可以选择屏蔽值，以便防止线程访问高速缓存中的一种或多种方式（例如，驱逐，擦除，删除等等等等）。 此外，掩码值可以设置为允许高速缓存中的某些方式在线程之间共享。

公开(公告)号：US08397090B2

公开(公告)日：2013-03-12

申请号：US11636425

申请日：2006-12-08

Applicant: Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

Inventor： Stephen H. Gunther ,  Edward Burton ,  Anant Deval ,  Stephan Jourdan ,  Robert Greiner ,  Mike Cornaby

IPC: G06F1/26 ,  G06F1/32

CPC classification number: G06F1/3203 ,  G06F1/324 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: Methods and apparatus to operate various logic blocks of an integrated circuit (IC) at independent voltages are described. In one embodiment, supply of power to one or more domains in an IC is adjusted based on an indication that power consumption by components of the corresponding domain is to be modified. Other embodiments are also described.

Abstract translation: 描述以独立电压操作集成电路（IC）的各种逻辑块的方法和装置。 在一个实施例中，基于对相应域的组件的功率消耗进行修改的指示来调整对IC中的一个或多个域的功率供给。 还描述了其它实施例。

公开(公告)号：US07405551B2

公开(公告)日：2008-07-29

申请号：US11430788

申请日：2006-05-08

Applicant: Edward A. Burton ,  Robert Greiner ,  Anant Deval ,  Douglas R. Huard

Inventor： Edward A. Burton ,  Robert Greiner ,  Anant Deval ,  Douglas R. Huard

IPC: G05F5/00

CPC classification number: H02M3/156 ,  H02M2001/0022

Abstract: A method and an apparatus to regulate voltage supply have been disclosed. In one embodiment, the apparatus includes a power converter block to generate an output voltage from an input voltage and a voltage regulator controller coupled to the power converter block to input at least one time-modulated signal to the power converter block, the at least one time-modulated signal having a duty cycle, the voltage regulator controller including a counter having an increment value substantially proportional to the input voltage, wherein the counter is used to adjust the duty cycle of the at least one time-modulated signal. Other embodiments have been claimed and described.

Abstract translation: 已经公开了一种用于调节电压供应的方法和装置。 在一个实施例中，该装置包括功率转换器块，用于从输入电压产生输出电压，耦合到功率转换器模块的电压调节器控制器将至少一个时间调制信号输入到功率转换器模块，该至少一个 具有占空比的时间调制信号，所述电压调节器控制器包括具有与所述输入电压基本成比例的增量值的计数器，其中所述计数器用于调整所述至少一个时间调制信号的占空比。 已经要求和描述了其它实施例。

公开(公告)号：US20080104425A1

公开(公告)日：2008-05-01

申请号：US11555609

申请日：2006-11-01

Applicant: Stephen H. Gunther ,  Edward A. Burton ,  Stephen H. Gunther ,  Robert Greiner ,  Michael Cornaby ,  Anant Deval ,  Stephan Jourdan

Inventor： Stephen H. Gunther ,  Edward A. Burton ,  Stephen H. Gunther ,  Robert Greiner ,  Michael Cornaby ,  Anant Deval ,  Stephan Jourdan

IPC: G06F1/26

CPC classification number: G06F1/3234 ,  G06F1/3203 ,  G06F1/324 ,  G06F1/3287 ,  G06F1/3296

Abstract: Independent power control of two or more processing cores. More particularly, at least one embodiment of the invention pertains to a technique to place at least one processing core in a power state without coordinating with the power state of one or more other processing cores

Abstract translation: 两个或多个处理核心的独立功率控制。 更具体地，本发明的至少一个实施例涉及一种将至少一个处理核放置在功率状态而不与一个或多个其它处理核的功率状态协调的技术

公开(公告)号：US20070262802A1

公开(公告)日：2007-11-15

申请号：US11432868

申请日：2006-05-12

Applicant: Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

Inventor： Doug Huard ,  Robert Greiner ,  Anant Deval ,  Edward Burton

IPC: H03K3/017

CPC classification number: H02M3/157 ,  H02M3/1584

Abstract: A voltage regulator is described for microelectronic devices using dual edge pulse width modulated control signal. In one example a first digital duty cycle value is received from a voltage controller and a pulse width modulated waveform is generated in response to the first duty cycle value, the waveform comprising a plurality of pulses with a modulated width. The waveform is applied to a voltage generator to generate a supply of power at a voltage determined by the duty cycle of the waveform. A second digital duty cycle value is received from the controller, and the leading edge of a subsequent pulse of the waveform is advanced if the second digital duty cycle value is greater than the first digital duty cycle. The trailing edge of the subsequent pulse of the waveform is advanced if the second digital duty cycle value is less than the first digital duty cycle value

Abstract translation: 对使用双边缘脉冲宽度调制控制信号的微电子器件描述了电压调节器。 在一个示例中，从电压控制器接收第一数字占空比值，并且响应于第一占空比值产生脉宽调制波形，该波形包括具有调制宽度的多个脉冲。 波形被施加到电压发生器以在由波形的占空比确定的电压下产生电力供应。 从控制器接收第二数字占空比值，并且如果第二数字占空比值大于第一数字占空比，则波形的后续脉冲的前沿被提前。 如果第二数字占空比值小于第一数字占空比值，则波形的后续脉冲的后沿被提前

公开(公告)号：US07013406B2

公开(公告)日：2006-03-14

申请号：US10272154

申请日：2002-10-14

Applicant: Alon Naveh ,  Roman Surgutchik ,  Stephen H. Gunther ,  Robert Greiner ,  Hung-Piao Ma ,  Kevin Dai ,  Keng Wong

Inventor： Alon Naveh ,  Roman Surgutchik ,  Stephen H. Gunther ,  Robert Greiner ,  Hung-Piao Ma ,  Kevin Dai ,  Keng Wong

IPC: G06F1/08

CPC classification number: G06F1/324 ,  G06F1/3203 ,  G06F1/3296 ,  Y02D10/126 ,  Y02D10/172

Abstract: In one embodiment, there is provided a method comprising determining a target operating point for an electronic device, the target operating point including a target operating frequency and a target operating voltage; and dynamically changing a current operating point for the electronic device including a current operating frequency and a current operating voltage by non-contemporaneously changing the current operating frequency to the target operating frequency and a current operating voltage to the target operating voltage, wherein during the changing the electronic device is in an active state.

Abstract translation: 在一个实施例中，提供了一种方法，包括确定电子设备的目标工作点，所述目标工作点包括目标工作频率和目标工作电压; 以及通过非当前将当前工作频率改变为目标工作频率和当前工作电压到目标工作电压来动态地改变包括当前工作频率和当前工作电压的电子设备的当前工作点，其中在改变期间 电子设备处于活动状态。

公开(公告)号：US20050141666A1

公开(公告)日：2005-06-30

申请号：US10750558

申请日：2003-12-31

Applicant: Ying Cole ,  Songmin Kim ,  Robert Greiner

Inventor： Ying Cole ,  Songmin Kim ,  Robert Greiner

IPC: H03K21/12 ,  H03K21/16 ,  H03K23/54

CPC classification number: H03K21/12 ,  H03K23/542

Abstract: Enabling pulse clocks are configurably generated for a selected one of a first and a second signaling mode, employing a configurable enabling pulse clock generator configurable to so generate the enabling pulse clocks.

Abstract translation: 为第一和第二信令模式中的所选择的一个可配置地产生使能脉冲时钟，采用可配置的使能脉冲时钟发生器，可配置为产生使能脉冲时钟。

公开(公告)号：US20050049345A1

公开(公告)日：2005-03-03

申请号：US10499043

申请日：2002-12-12

Applicant: Robert Greiner ,  Manfred Ochsenkuhn ,  Lothar Schon

Inventor： Robert Greiner ,  Manfred Ochsenkuhn ,  Lothar Schon

IPC: C08K3/00 ,  C08K3/08 ,  F28F21/06 ,  C08K3/38 ,  C08K3/18 ,  C08K3/40

CPC classification number: F28F21/062 ,  C08K3/01 ,  C08K3/08 ,  F28F2013/006 ,  Y10T428/139

Abstract: The invention relates to flexible compounds that are made of a thermoplastic elastomer and a filler having increased thermal conductivity, and to flexible heat-conducting tubes produced on the basis thereof that are especially useful as heating or cooling tubes. The inventive mixtures have a thermal conductivity in the range of from 0.5 to 2 W/mK.

Abstract translation: 本发明涉及由热塑性弹性体制成的柔性化合物和具有增加导热性的填料，以及基于其制备的柔性导热管，其特别适用于加热或冷却管。 本发明的混合物具有在0.5至2W / mK范围内的热导率。

公开(公告)号：US06809134B2

公开(公告)日：2004-10-26

申请号：US10257664

申请日：2002-10-15

Applicant: Robert Greiner ,  Heinrich Kapitza ,  Manfred Ochsenkuehn

Inventor： Robert Greiner ,  Heinrich Kapitza ,  Manfred Ochsenkuehn

IPC: C08K1302

CPC classification number: C03C3/16 ,  C08K3/40

Abstract: The thermoplast-based glass/plastic compounds according to the invention contain a low melting point sulfophosphate glass having the following composition: 4 to 10% Li2O; 4 to 10% Na2O; 4 to 8% K2O; 1 to 2% CaO; 35 to 37% ZnO; 0 to 3% La2O3; 19 to 22% P2O5 and 19 to 22% SO3, a high-performance thermoplast, an organic additive and/or a mineral filling material and optionally also carbon black and/or a sterically hindered phosphite or phenol.

公开(公告)号：US06216208B1

公开(公告)日：2001-04-10

申请号：US08999241

申请日：1997-12-29

Applicant: Robert Greiner ,  David L. Hill ,  Chinna Prudvi ,  Derek T. Bachand ,  Matthew A. Fisch

Inventor： Robert Greiner ,  David L. Hill ,  Chinna Prudvi ,  Derek T. Bachand ,  Matthew A. Fisch

IPC: G05F1208

CPC classification number: G06F9/383 ,  G06F12/0862 ,  G06F2212/6026

Abstract: A prefetching control system provided for a processor. The prefetching queue may include an arbiter, a cache queue and a prefetch queue. The arbiter issues requests including read requests. Responsive to a read request, the cache queue issues a control signal. The prefetch queue receives the control signal and an address associated with the read request. When the received address is a member of a pattern of read requests from sequential memory locations, the prefetch queue issues a prefetch request to the arbiter.

Abstract translation: 为处理器提供的预取控制系统。 预取队列可以包括仲裁器，高速缓存队列和预取队列。 仲裁器发出请求，包括读取请求。 响应于读取请求，缓存队列发出控制信号。 预取队列接收控制信号和与读取请求相关联的地址。 当接收到的地址是来自顺序存储器位置的读取请求的模式的成员时，预取队列向仲裁器发出预取请求。