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公开(公告)号：US20140334053A1
公开(公告)日：2014-11-13
申请号：US14372608
申请日：2012-01-20
申请人： Philippe Renaud , Philippe Dupuy
发明人： Philippe Renaud , Philippe Dupuy
摘要： An over-current protection circuit including, a current supply switch with a first terminal coupled to a supply current input and with a second terminal coupled to a supply current output. The current supply switch is switchable at least between an on-state, in which the current supply switch provides a conductive connection between the first terminal and the second terminal, and an off-state, in which the current supply switch interrupts the conductive connection between the first terminal and the second terminal. The over-current protection circuit receives a supply current via the supply current input and provides the supply current via the supply current output if the switch is in the on-state. The current supply switch includes High Electron Mobility Transistor.
摘要翻译： 一种过流保护电路，包括：电流源开关，其具有耦合到电源电流输入端的第一端子和耦合到电源电流输出端的第二端子。 至少在导通状态之间切换电流供应开关，其中电流供应开关提供第一端子和第二端子之间的导电连接，以及断开状态，其中电流供应开关中断导电连接 第一终端和第二终端。 过电流保护电路通过电源电流输入端接收电源电流，如果开关处于导通状态，则通过电源电流输出提供电源电流。 电流源开关包括高电子迁移率晶体管。
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公开(公告)号：US09787079B2
公开(公告)日：2017-10-10
申请号：US14372608
申请日：2012-01-20
申请人： Philippe Renaud , Philippe Dupuy
发明人： Philippe Renaud , Philippe Dupuy
摘要： An over-current protection circuit including, a current supply switch with a first terminal coupled to a supply current input and with a second terminal coupled to a supply current output. The current supply switch is switchable at least between an on-state, in which the current supply switch provides a conductive connection between the first terminal and the second terminal, and an off-state, in which the current supply switch interrupts the conductive connection between the first terminal and the second terminal. The over-current protection circuit receives a supply current via the supply current input and provides the supply current via the supply current output if the switch is in the on-state. The current supply switch includes a High Electron Mobility Transistor.
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公开(公告)号：US09995668B2
公开(公告)日：2018-06-12
申请号：US12278087
申请日：2007-02-01
CPC分类号： G01N15/12 , B01L3/502746 , B01L3/502761 , B01L2200/0647 , B01L2200/0668 , B01L2200/12 , B01L2200/147 , B01L2300/0645 , B01L2300/0864 , B01L2400/0415 , B01L2400/0424 , B01L2400/086 , B03C5/026
摘要： Microfluidic system comprising a space for containing a liquid and at least one lateral chamber in communication with said space, said lateral chamber containing a metal electrode. The lateral chamber and the space are designed to be filled by the same or different liquid when the system is active.
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公开(公告)号：US09825162B2
公开(公告)日：2017-11-21
申请号：US13503861
申请日：2009-11-19
申请人： Philippe Renaud , Bruce Green
发明人： Philippe Renaud , Bruce Green
IPC分类号： H01L29/778 , H01L21/8252 , H01L27/06 , H01L29/66 , H01L29/20 , H01L29/417
CPC分类号： H01L29/7786 , H01L21/8252 , H01L27/0605 , H01L29/2003 , H01L29/417 , H01L29/66462 , H01L29/7788
摘要： A vertical power transistor device comprises: a substrate formed from a III-V semiconductor material and a multi-layer stack at least partially accommodated in the substrate. The multi-layer stack comprises: a semi-insulating layer disposed adjacent the substrate and a first layer formed from a first III-V semiconductor material and disposed adjacent the semi-insulating layer. The multi-layer stack also comprises a second layer formed from a second III-V semiconductor material disposed adjacent the first layer and a heterojunction is formed at an interface of the first and second layers.
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公开(公告)号：US20160056114A1
公开(公告)日：2016-02-25
申请号：US14463982
申请日：2014-08-20
IPC分类号： H01L23/60 , H01L29/66 , H01L29/06 , H01L29/40 , H01L21/306 , H01L21/71 , H01L21/265 , H01L29/10 , H01L29/78 , H01L21/283
CPC分类号： H01L23/60 , H01L21/26586 , H01L21/283 , H01L21/30604 , H01L21/71 , H01L29/0634 , H01L29/0653 , H01L29/0696 , H01L29/0847 , H01L29/1045 , H01L29/1095 , H01L29/402 , H01L29/404 , H01L29/407 , H01L29/4175 , H01L29/66659 , H01L29/66681 , H01L29/7817 , H01L29/7823 , H01L29/7835 , H01L2924/0002 , H01L2924/00
摘要： A device includes a semiconductor substrate having a surface with a trench, first and second conduction terminals supported by the semiconductor substrate, a control electrode supported by the semiconductor substrate between the first and second conduction terminals and configured to control flow of charge carriers during operation between the first and second conduction terminals, and a Faraday shield supported by the semiconductor substrate and disposed between the control electrode and the second conduction terminal. At least a portion of the Faraday shield is disposed in the trench.
摘要翻译： 一种器件包括具有沟槽的表面的半导体衬底，由半导体衬底支撑的第一和第二导电端子，由第一和第二导电端子之间的半导体衬底支撑的控制电极，并且被配置为在第一和第二导电端子之间的运行期间控制电荷载流子的流动 第一和第二导电端子以及由半导体衬底支撑并设置在控制电极和第二导电端子之间的法拉第屏蔽。 法拉第屏蔽的至少一部分设置在沟槽中。
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公开(公告)号：US09040463B2
公开(公告)日：2015-05-26
申请号：US13141570
申请日：2009-12-23
申请人： Nicolas Demierre , Nader Donzel , Jose Gil , Philippe Renaud
发明人： Nicolas Demierre , Nader Donzel , Jose Gil , Philippe Renaud
IPC分类号： G01N33/543 , B01L3/00
CPC分类号： G01N33/54373 , B01J2219/005 , B01J2219/00556 , B01L3/502761 , B01L2200/0647 , B01L2300/0654 , B01L2400/0424 , B01L2400/043 , B01L2400/0487
摘要： The invention provides a multiplexed assay device comprising a reaction chamber and several sets of encoded microcarriers 2 wherein the reaction chamber is a microchannel 1 and wherein the longitudinal movement of the microcarriers 2 is restricted and wherein the microcarriers 2 have a shape in relation to the geometry of the microchannel 1 such that at least two can stand side by side in the microchannel 1 without touching each other and without touching the perimeter of the microchannel 1 and are preferably observable in the reaction chamber. Moreover, the invention provides a method for performing multiplexed assay based on microcarriers 2 that improves mass transfer, simplifies the preparation and the execution of the assay and facilitates readout of biological reactions and identity of microcarriers 2.
摘要翻译： 本发明提供了一种多重测定装置，其包括反应室和若干组编码的微载体2，其中反应室是微通道1，并且其中微载体2的纵向运动受到限制，并且其中微载体2具有相对于几何形状的形状 使得至少两个可以在微通道1中并排放置而不彼此接触并且不接触微通道1的周边，并且优选在反应室中可观察到。 此外，本发明提供了一种用于进行基于微载体2的多重测定的方法，其提高了质量传递，简化了测定的准备和执行，并且促进了微载体的生物学反应和身份的读出。
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7.发明授权公开(公告)号：US08390091B2
公开(公告)日：2013-03-05
申请号：US13143548
申请日：2009-02-03
申请人： Philippe Renaud
发明人： Philippe Renaud
IPC分类号： H01L29/47
CPC分类号： H01L29/0847 , H01L21/746 , H01L27/0605 , H01L27/0629 , H01L29/2003 , H01L29/4175 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7787 , H01L29/872
摘要： A monolithic semiconductor structure includes a stack of layers. The stack includes a substrate; a first layer made from a first semiconductor material; and a second layer made from a second semiconductor material. The first layer is situated between the substrate and the second layer and at least one of the first semiconductor material and the second semiconductor material contains a III-nitride material. The structure includes a power transistor, including a body formed in the stack of layers; a first power terminal at a side of the first layer facing the second layer; a second power terminal at least partly formed in the substrate; and a gate structure for controlling the propagation through the body of electric signals between the first power terminal and the second power terminal. The structure further includes a vertical Schottky diode, including: an anode; a cathode including the substrate, and a Schottky barrier between the cathode and the anode, the Schottky barrier being situated between the substrate and a anode layer in the stack of layers.
摘要翻译： 单片半导体结构包括一叠层。 堆叠包括基板; 由第一半导体材料制成的第一层; 以及由第二半导体材料制成的第二层。 第一层位于衬底和第二层之间，并且第一半导体材料和第二半导体材料中的至少一个含有III族氮化物材料。 该结构包括功率晶体管，其包括形成在层叠层中的主体; 位于所述第一层的面向所述第二层的一侧的第一电源端子; 至少部分地形成在所述基板中的第二电源端子; 以及栅极结构，用于控制在第一电力端子和第二电力端子之间通过主体的电信号的传播。 该结构还包括垂直肖特基二极管，包括：阳极; 包括衬底的阴极和在阴极和阳极之间的肖特基势垒，肖特基势垒位于衬底和堆叠层中的阳极层之间。
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公开(公告)号：US20110306506A1
公开(公告)日：2011-12-15
申请号：US13141570
申请日：2009-12-23
申请人： Nicolas Demierre , Donzel Nader , Jose Gil , Philippe Renaud
发明人： Nicolas Demierre , Donzel Nader , Jose Gil , Philippe Renaud
CPC分类号： G01N33/54373 , B01J2219/005 , B01J2219/00556 , B01L3/502761 , B01L2200/0647 , B01L2300/0654 , B01L2400/0424 , B01L2400/043 , B01L2400/0487
摘要： The invention provides a multiplexed assay device comprising a reaction chamber and several sets of encoded microcarriers 2 wherein the reaction chamber is a microchannel 1 and wherein the longitudinal movement of the microcarriers 2 is restricted and wherein the microcarriers 2 have a shape in relation to the geometry of the microchannel 1 such that at least two can stand side by side in the microchannel 1 without touching each other and without touching the perimeter of the microchannel 1 and are preferably observable in the reaction chamber. Moreover, the invention provides a method for performing multiplexed assay based on microcarriers 2 that improves mass transfer, simplifies the preparation and the execution of the assay and facilitates readout of biological reactions and identity of microcarriers 2.
摘要翻译： 本发明提供了一种多重测定装置，其包括反应室和若干组编码的微载体2，其中反应室是微通道1，并且其中微载体2的纵向运动受到限制，并且其中微载体2具有相对于几何形状的形状 使得至少两个可以在微通道1中并排放置而不彼此接触并且不接触微通道1的周边，并且优选在反应室中可观察到。 此外，本发明提供了一种用于进行基于微载体2的多重测定的方法，其提高了质量传递，简化了测定的准备和执行，并且促进了微载体的生物学反应和身份的读出。
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公开(公告)号：US20110301665A1
公开(公告)日：2011-12-08
申请号：US13128821
申请日：2009-11-12
申请人： Andre Mercanzini , Philippe Renaud
发明人： Andre Mercanzini , Philippe Renaud
IPC分类号： A61N1/05
CPC分类号： A61N1/0534 , A61B5/04001 , A61B5/6868 , A61B17/34 , A61N1/0529 , A61N1/0531 , A61N1/37205 , Y10T29/49117
摘要： Described herein are microelectrode array devices, and methods of fabrication and use of the same, to provide highly localized and efficient electrical stimulation of a neurological target. The device includes multiple microelectrode elements arranged along an elongated probe shaft. The microelectrode elements are dimensioned and shaped so as to target individual neurons, groups of neurons, and neural tissue as may be located in an animal nervous system, such as deep within a human brain. Beneficially, the neurological probe can be used to facilitate location of the neurological target and remain implanted for long-term monitoring and/or stimulation.
摘要翻译： 本文描述的是微电极阵列器件及其制造和使用方法，以提供对神经靶标的高度局部化和有效的电刺激。 该装置包括沿细长探针轴布置的多个微电极元件。 微电极元件的尺寸和形状被设计成针对可能位于动物神经系统中的单个神经元，神经元组和神经组织，例如人类脑内深处。 有利地，神经学探针可用于促进神经系统靶的定位并保持植入用于长期监测和/或刺激。
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10.发明申请公开(公告)号：US20110278598A1
公开(公告)日：2011-11-17
申请号：US13143548
申请日：2009-02-03
申请人： Philippe Renaud
发明人： Philippe Renaud
IPC分类号： H01L29/16 , H01L29/20 , H01L21/329 , H01L29/778
CPC分类号： H01L29/0847 , H01L21/746 , H01L27/0605 , H01L27/0629 , H01L29/2003 , H01L29/4175 , H01L29/517 , H01L29/518 , H01L29/66462 , H01L29/7787 , H01L29/872
摘要： A monolithic semiconductor structure includes a stack of layers. The stack includes a substrate; a first layer made from a first semiconductor material; and a second layer made from a second semiconductor material. The first layer is situated between the substrate and the second layer and at least one of the first semiconductor material and the second semiconductor material contains a III-nitride material. The structure includes a power transistor, including a body formed in the stack of layers; a first power terminal at a side of the first layer facing the second layer; a second power terminal at least partly formed in the substrate; and a gate structure for controlling the propagation through the body of electric signals between the first power terminal and the second power terminal. The structure further includes a vertical Schottky diode, including: an anode; a cathode including the substrate, and a Schottky barrier between the cathode and the anode, the Schottky barrier being situated between the substrate and a anode layer in the stack of layers.
摘要翻译： 单片半导体结构包括一叠层。 堆叠包括基板; 由第一半导体材料制成的第一层; 以及由第二半导体材料制成的第二层。 第一层位于衬底和第二层之间，并且第一半导体材料和第二半导体材料中的至少一个含有III族氮化物材料。 该结构包括功率晶体管，其包括形成在层叠层中的主体; 位于所述第一层的面向所述第二层的一侧的第一电源端子; 至少部分地形成在所述基板中的第二电源端子; 以及栅极结构，用于控制在第一电力端子和第二电力端子之间通过主体的电信号的传播。 该结构还包括垂直肖特基二极管，包括：阳极; 包括衬底的阴极和在阴极和阳极之间的肖特基势垒，肖特基势垒位于衬底和堆叠层中的阳极层之间。
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