-
1.发明授权公开(公告)号：US12107646B2
公开(公告)日：2024-10-01
申请号：US17946937
申请日：2022-09-16
Applicant: QUALCOMM Incorporated
Inventor： Vasanthan Raghavan , Shrenik Patel , Rajagopalan Rangarajan , Damin Cao , Kang Yang , Jung Ho Ryu , Junyi Li
IPC: H04L23/02 , H04B7/01 , H04B7/0426 , H04W8/22 , H04W72/044
CPC classification number: H04B7/043 , H04B7/01 , H04W8/22 , H04W72/046 , H04W72/0473
Abstract: Methods, systems, and devices for wireless communication are described. In some systems, a user equipment (UE) may transmit, to a network entity, a first signal including a request to update a resolution of a phase shifting operation associated with beam-based communications. The UE may receive, from the network entity, a second signal approving the request. The UE may communicate using a beam according to an updated resolution of the phase shifting operation based on the second signal approving the request. Additionally, or alternatively, the UE may transmit a first signal including a request to suspend a beam refinement process based on the resolution of the phase shifting operation. The UE may receive a second signal approving the request to suspend the beam refinement process. The UE may communicate with the network entity using a beam based on suspending further beam refinement in response to the second signal.
-
公开(公告)号：US10990117B2
公开(公告)日：2021-04-27
申请号：US16561839
申请日：2019-09-05
Applicant: QUALCOMM Incorporated
Inventor： Yue Chao , Marco Zanuso , Rajagopalan Rangarajan , Yiwu Tang
Abstract: Certain aspects of the present disclosure provide a low drop-out (LDO) regulator. The LDO regulator generally includes a first p-type metal-oxide-semiconductor transistor (PMOS) having a drain coupled to an output node of the LDO regulator, a first amplifier having an input coupled to a reference voltage node and an output coupled to a gate of the first PMOS transistor, a second PMOS transistor having a source coupled to the output node, and a second amplifier having an input coupled to the output node and an output coupled to a gate of the second PMOS transistor.
-
公开(公告)号：US09525503B2
公开(公告)日：2016-12-20
申请号：US14513003
申请日：2014-10-13
Applicant: QUALCOMM Incorporated
Inventor： Chiewcharn Narathong , Lai Kan Leung , Dongling Pan , Rajagopalan Rangarajan , Kevin Hsi-huai Wang , Bhushan Shanti Asuri , Yiwu Tang
IPC: H04J3/00 , H04J4/00 , H04W88/02 , H04B1/3827 , H04L5/14 , H04B1/00 , H04B1/403 , H04L5/00 , H04B1/50 , H04B1/54
CPC classification number: H04J4/00 , H04B1/0082 , H04B1/3833 , H04B1/403 , H04B1/50 , H04B1/54 , H04B7/00 , H04L5/001 , H04L5/0023 , H04L5/14 , H04L5/1469 , H04L7/00 , H04L27/36 , H04L27/38 , H04W88/02
Abstract: Reconfiguring a transceiver design using a plurality of frequency synthesizers and a plurality of carrier aggregation (CA) receiver (Rx) and transmitter (Tx) chains, the method including: connecting a first frequency synthesizer to a first CA Tx chain; connecting the plurality of frequency synthesizers to the plurality of CA Rx chains, wherein a second frequency synthesizer of the plurality of frequency synthesizers is connected as a shared synthesizer to a first CA Rx chain and a second CA Tx chain.
Abstract translation: 使用多个频率合成器和多个载波聚合（CA）接收机（Rx）和发射机（Tx）链重新配置收发器设计，所述方法包括：将第一频率合成器连接到第一CA Tx链; 将多个频率合成器连接到多个CA Rx链，其中多个频率合成器中的第二频率合成器作为共享合成器连接到第一CA Rx链和第二CA Tx链。
-
公开(公告)号：US20150333949A1
公开(公告)日：2015-11-19
申请号：US14664492
申请日：2015-03-20
Applicant: QUALCOMM Incorporated
Inventor： Aleksandar Miodrag Tasic , Chiewcharn Narathong , Christian Holenstein , Dongling Pan , Yiwu Tang , Rajagopalan Rangarajan , Lai Kan Leung
IPC: H04L27/26 , H04L12/709 , H04L12/761
CPC classification number: H04L27/2653 , H03F1/223 , H03F3/193 , H03F3/245 , H04B1/0064 , H04L45/16 , H04L45/245
Abstract: Multiplex modules for use in carrier aggregation receivers are disclosed. In an exemplary embodiment, an apparatus includes an LNA multiplexer configured to receive a plurality of RF signals at a plurality of input terminals and to combine the RF signals into a combined RF signal that is output from an output terminal The apparatus also includes an LNA demultiplexer configured to receive the combined RF signal at an input port that is connected to the output terminal and to distribute the combined RF signal to a plurality of output ports.
Abstract translation: 公开了用于载波聚合接收机的多路复用模块。 在示例性实施例中，一种装置包括LNA复用器，其被配置为在多个输入端子处接收多个RF信号，并将RF信号组合成从输出端输出的组合RF信号。该装置还包括LNA解复用器 被配置为在连接到输出端子的输入端口处接收组合的RF信号，并将组合的RF信号分配到多个输出端口。
-
5.发明公开公开(公告)号：US20240097749A1
公开(公告)日：2024-03-21
申请号：US17946937
申请日：2022-09-16
Applicant: QUALCOMM Incorporated
Inventor： Vasanthan Raghavan , Shrenik Patel , Rajagopalan Rangarajan , Damin Cao , Kang Yang , Jung Ho Ryu , Junyi Li
IPC: H04B7/0426 , H04B7/01 , H04W8/22 , H04W72/04
CPC classification number: H04B7/043 , H04B7/01 , H04W8/22 , H04W72/046 , H04W72/0473
Abstract: Methods, systems, and devices for wireless communication are described. In some systems, a user equipment (UE) may transmit, to a network entity, a first signal including a request to update a resolution of a phase shifting operation associated with beam-based communications. The UE may receive, from the network entity, a second signal approving the request. The UE may communicate using a beam according to an updated resolution of the phase shifting operation based on the second signal approving the request. Additionally, or alternatively, the UE may transmit a first signal including a request to suspend a beam refinement process based on the resolution of the phase shifting operation. The UE may receive a second signal approving the request to suspend the beam refinement process. The UE may communicate with the network entity using a beam based on suspending further beam refinement in response to the second signal.
-
Patent Agency Ranking
公开(公告)号：US20220311423A1
公开(公告)日：2022-09-29
申请号：US17211716
申请日：2021-03-24
Applicant: Qualcomm Incorporated
Inventor： Timothy Donald Gathman , Lai Kan Leung , Chirag Dipak Patel , Xinmin Yu , Rajagopalan Rangarajan
IPC: H03H11/22
Abstract: An example apparatus includes a polyphase transconductance-capacitor filter. The polyphase filter includes a DC bias voltage node, a plus in-phase filter unit, a minus in-phase filter unit, a plus quadrature-phase filter unit, and a minus quadrature-phase filter unit. Each filter unit respectively includes an input node, an output node, and a control node. The polyphase filter also includes a plus in-phase switch and a minus in-phase switch. The plus in-phase switch is coupled to the control node of the plus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit. The minus in-phase switch is coupled to the control node of the minus in-phase filter unit, the DC bias voltage node, and the input node of one or both of the plus quadrature-phase filter unit and the minus quadrature-phase filter unit.
-
公开(公告)号：US20200073428A1
公开(公告)日：2020-03-05
申请号：US16356435
申请日：2019-03-18
Applicant: QUALCOMM Incorporated
Inventor： Mohamed Abouzied , Rajagopalan Rangarajan , Peter Shah
Abstract: A circuit includes a first transistor that conducts a first current responsive to a DC bias voltage and an RF signal. A second transistor conducts a second current responsive to the DC bias voltage. The first current and the second current are mirrored through a pair of current mirrors coupled together through a low-pass filter to filter the envelope of the RF signal.
-
8.发明授权公开(公告)号：US09529380B1
公开(公告)日：2016-12-27
申请号：US14818191
申请日：2015-08-04
Applicant: QUALCOMM Incorporated
Inventor： Sujiang Rong , Rajagopalan Rangarajan
CPC classification number: G06F1/04 , H03B19/14 , H03B27/00 , H03D7/14 , H03D7/165 , H03D7/18 , H03D2200/0088 , H03K5/01 , H03K21/026 , H03K2005/00013
Abstract: A circuit for generating a local oscillator signal includes: at least one divider module configured to receive an input signal and divide a frequency of the input signal by a division ratio; and a load circuit coupled to the at least one divider module, the load circuit configured to provide balanced current pulses that substantially reduce at least a portion of harmonic current ripples in the local oscillator signal.
Abstract translation: 一种用于产生本地振荡器信号的电路包括：至少一个分频器模块，被配置为接收输入信号并且将所述输入信号的频率除以分频比; 以及耦合到所述至少一个除法器模块的负载电路，所述负载电路被配置为提供平衡电流脉冲，其基本上减少所述本地振荡器信号中的谐波电流纹波的至少一部分。
-
9.发明申请RADIO FREQUENCY (RF) FRONT END HAVING MULTIPLE LOW NOISE AMPLIFIER MODULES 有权具有多个低噪声放大器模块的无线电频率（RF）前端公开(公告)号：US20150333941A1
公开(公告)日：2015-11-19
申请号：US14671939
申请日：2015-03-27
Applicant: QUALCOMM Incorporated
Inventor： Dongling Pan , Aleksandar Miodrag Tasic , Rajagopalan Rangarajan , Lai Kan Leung , Chiewcharn Narathong , Yiwu Tang
CPC classification number: H04L27/063 , H04B1/005 , H04B1/10 , H04B7/26
Abstract: A radio frequency (RF) front end having multiple low noise amplifiers modules is disclosed. In an exemplary embodiment, an apparatus includes at least one first stage amplifier configured to amplify received carrier signals to generate at least one first stage carrier group. Each first stage carrier group includes a respective portion of the carrier signals. The apparatus also includes second stage amplifiers configured to amplify the first stage carrier groups. Each second stage amplifier configured to amplify a respective first stage carrier group to generate two second stage output signals that may be output to different demodulation stages where each demodulation stage demodulates a selected carrier signal.
Abstract translation: 公开了具有多个低噪声放大器模块的射频（RF）前端。 在示例性实施例中，装置包括至少一个第一级放大器，其配置成放大接收的载波信号以产生至少一个第一级载波组。 每个第一级载波组包括载波信号的相应部分。 该装置还包括配置成放大第一级载波组的第二级放大器。 每个第二级放大器被配置为放大相应的第一级载波组以产生两个第二级输出信号，其可以被输出到不同的解调级，其中每个解调级解调所选择的载波信号。
-
公开(公告)号：US09184707B2
公开(公告)日：2015-11-10
申请号：US13899091
申请日：2013-05-21
Applicant: QUALCOMM Incorporated
Inventor： Rajagopalan Rangarajan , Chirag D Patel
CPC classification number: H03F3/2171 , H03F3/72 , H03G1/0029 , H03G1/0088 , H03G3/3052
Abstract: An amplifier having a switchable common gate gain buffer is disclosed. In an exemplary embodiment, an apparatus includes a plurality of selectable gain channels that provide constant input impedance at a common input to receive an input signal and generate an output signal having at least one of selected gain and current characteristics. At least two gain channels utilize transistors having different transconductance values. The apparatus also includes at least one impedance network coupled to at least one gain channel to provide the constant input impedance.
Abstract translation: 公开了具有可切换公共栅极增益缓冲器的放大器。 在示例性实施例中，一种装置包括多个可选择的增益通道，其在公共输入处提供恒定的输入阻抗以接收输入信号并产生具有选定的增益和电流特性中的至少一个的输出信号。 至少两个增益通道利用具有不同跨导值的晶体管。 该装置还包括耦合到至少一个增益通道以提供恒定输入阻抗的至少一个阻抗网络。
-
-
-
-
-
-
-
-
-
Search Results
31
records
(took 0.016 seconds)
