Ring oscillator architecture with controlled sensitivity to supply voltage

    公开(公告)号:US09692396B2

    公开(公告)日:2017-06-27

    申请号:US14711158

    申请日:2015-05-13

    CPC classification number: H03K3/0315 H03K3/011 H03L7/0995 H03L7/0997

    Abstract: A method and apparatus for controlling a supply sensitivity of a ring oscillator stage are provided. The apparatus is configured to generate, via a voltage biasing module, a first bias signal for a PMOS biasing module based on a supply voltage and a second bias signal for a NMOS biasing module based on the supply voltage, bias, via the PMOS biasing module, triode PMOS degeneration of the inverting module based on the first bias signal, bias, via the NMOS biasing module, triode NMOS degeneration of the inverting module based on the second bias signal, receive an input via an inverting module, and output, via the inverting module, an inverted version of the received input based on the biased triode NMOS degeneration and the biased triode PMOS degeneration.

    Multi-Input Scalable Rectifier Droop Detector
    4.
    发明申请
    Multi-Input Scalable Rectifier Droop Detector 有权
    多输入可伸缩整流器下垂探测器

    公开(公告)号:US20160285385A1

    公开(公告)日:2016-09-29

    申请号:US14670996

    申请日:2015-03-27

    Abstract: A droop detector includes: a plurality of input nodes, each input node configured to receive a supply voltage; an output node; a plurality of detector modules, each detector module comprises: an input terminal coupled to each input node, an output terminal coupled to the output node; and an input tracking unit configured as a voltage follower to detect a droop in the supply voltage coupled to each input node and output an output voltage that follows the supply voltage on the output terminal when the droop is detected on the supply voltage; and a comparator coupled to the output node and configured to output a control signal when the droop is detected.

    Abstract translation: 下垂检测器包括:多个输入节点,每个输入节点被配置为接收电源电压; 输出节点; 多个检测器模块,每个检测器模块包括:耦合到每个输入节点的输入端子,耦合到输出节点的输出端子; 以及输入跟踪单元,被配置为电压跟随器,用于检测耦合到每个输入节点的电源电压中的下降,并且当在所述电源电压上检测到所述下降时,输出在所述输出端子上的所述电源电压之后的输出电压; 以及耦合到输出节点并被配置为当检测到下降时输出控制信号的比较器。

    Circuits and Methods Providing Clock Frequency Adjustment in Response to Supply Voltage Changes
    6.
    发明申请
    Circuits and Methods Providing Clock Frequency Adjustment in Response to Supply Voltage Changes 有权
    电路和方法提供响应电源电压变化的时钟频率调整

    公开(公告)号:US20170005665A1

    公开(公告)日:2017-01-05

    申请号:US14789095

    申请日:2015-07-01

    CPC classification number: H03L7/099 H03B5/04 H03B2202/042 H03B2202/06 H03L1/00

    Abstract: Methods, systems, and circuits for providing compensation for voltage variation are disclosed. A system includes: a voltage comparator configured to assert a control signal in response to detecting that one or more of power supply voltages droops below a threshold amount; a phase locked loop (PLL) configured to divide an output frequency for the PLL in response to the assertion of the control signal; a plurality of voltage sensors corresponding to the plurality of power supply voltages, the voltage sensors configured to output respective digital signals indicative of a voltage level of its corresponding power supply voltage; and a control circuit configured to control an oscillator frequency in the PLL during the open-loop mode responsive to the respective digital signals.

    Abstract translation: 公开了用于提供电压变化补偿的方法,系统和电路。 一种系统包括:电压比较器,配置成响应于检测到一个或多个电源电压下降到阈值以下,来控制控制信号; 锁相环(PLL),被配置为响应于所述控制信号的断言来分频所述PLL的输出频率; 对应于多个电源电压的多个电压传感器,所述电压传感器被配置为输出表示其相应电源电压的电压电平的各个数字信号; 以及控制电路,被配置为响应于各个数字信号在开环模式期间控制PLL中的振荡器频率。

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