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22 条记录 (耗时 0.013 秒)

    Differential crystal oscillator circuit
    1.
    发明授权
    Differential crystal oscillator circuit 有权
    差分晶振电路

    公开(公告)号：US09300249B2

    公开(公告)日：2016-03-29

    申请号：US14338241

    申请日：2014-07-22

    申请人： QUALCOMM Incorporated

    发明人： Yashar Rajavi ,  Amirpouya Kavousian ,  Alireza Khalili ,  Mohammad Bagher Vahid Far ,  Abbas Komijani

    IPC分类号： H03B5/32 ,  H03B5/36

    CPC分类号： H03B5/364 ,  H03B5/06 ,  H03B5/36 ,  H03B2200/004 ,  H03B2200/0094

    摘要： A differential crystal oscillator circuit, including: first and second output terminals; a cross-coupled oscillation unit including first and second transistors cross-coupled to the first and second output terminals; first and second metal-oxide semiconductor field-effect transistor (MOSFET) diodes, each MOSFET diode including a resistor connected between gate and drain terminals, wherein the first MOSFET diode couples to the first transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the first transistor, wherein the second MOSFET diode couples to the second transistor to provide low-impedance load at low frequencies and high-impedance load at higher frequencies to the second transistor; and a reference resonator coupled between the first and second output terminals to establish an oscillation frequency.

    摘要翻译： 一种差分晶体振荡器电路，包括：第一和第二输出端子; 交叉耦合振荡单元，包括交叉耦合到第一和第二输出端的第一和第二晶体管; 第一和第二金属氧化物半导体场效应晶体管（MOSFET）二极管，每个MOSFET二极管包括连接在栅极和漏极端子之间的电阻器，其中第一MOSFET二极管耦合到第一晶体管以在低频和高电平下提供低阻抗负载 在第一晶体管的较高频率处的阻抗负载，其中所述第二MOSFET二极管耦合到所述第二晶体管，以在低频处提供低阻抗负载，并以较高频率向所述第二晶体管提供高阻抗负载; 以及耦合在第一和第二输出端子之间以建立振荡频率的参考谐振器。

    LOW-POWER BALANCED CRYSTAL OSCILLATOR
    2.
    发明申请
    LOW-POWER BALANCED CRYSTAL OSCILLATOR 有权
    低功耗平衡振荡器

    公开(公告)号：US20160380590A1

    公开(公告)日：2016-12-29

    申请号：US14748946

    申请日：2015-06-24

    申请人： QUALCOMM Incorporated

    发明人： Alireza Khalili ,  Yashar Rajavi ,  Mazhareddin Taghivand

    IPC分类号： H03B5/36

    CPC分类号： H03B5/364 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2200/0036 ,  H03B2200/0082

    摘要： A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

    摘要翻译： 电路包括：第一和第二输出端子; 耦合在所述第一和第二输出端子之间的参考谐振器; 耦合到所述第一和第二输出端子的交叉耦合振荡单元; 耦合到所述交叉耦合振荡单元的第一MOSFET二极管，所述第一MOSFET二极管包括第一晶体管，耦合在所述第一晶体管的栅极和漏极端子之间的第一电阻器和第一电容器; 耦合到交叉耦合振荡单元的第二MOSFET二极管，所述第二MOSFET二极管包括第二晶体管，耦合在所述第二晶体管的栅极和漏极端子之间的第二电阻器以及耦合在所述第二晶体管的漏极端子之间的第二电容器 和第一晶体管的栅极端子，其中第一电容器交叉耦合在第一晶体管的漏极端子和第二晶体管的栅极端子之间。

    Apparatus and method for generating quadrupled reference clock from single ended crystal oscillator
    3.
    发明授权
    Apparatus and method for generating quadrupled reference clock from single ended crystal oscillator 有权
    从单端晶体振荡器产生四倍参考时钟的装置和方法

    公开(公告)号：US09490784B2

    公开(公告)日：2016-11-08

    申请号：US14640672

    申请日：2015-03-06

    申请人： QUALCOMM Incorporated

    发明人： Mohammad Bagher Vahid Far ,  Alireza Khalili ,  Yashar Rajavi ,  Amirpouya Kavousian

    IPC分类号： H03B19/14 ,  H03K5/156 ,  H03K5/00 ,  H03B19/10

    CPC分类号： H03K5/00006 ,  H03B19/10 ,  H03B19/14 ,  H03K5/1565

    摘要： A method, an apparatus, and a computer program product are provided. The apparatus outputs a sinusoidal signal according to a first clock frequency, generates, a first digital signal having a 25% duty cycle based on the sinusoidal signal, generates a second digital signal having a 25% duty cycle based on the sinusoidal signal, combines the first digital signal and the second digital signal to generate a combined digital signal having a 50% duty cycle and a second clock frequency that is double the first clock frequency, and doubles the second clock frequency of the combined digital signal to generate an output signal having a third clock frequency that is quadruple the first clock frequency. The apparatus further generates a first control voltage and a second control voltage for the first buffer and a third control voltage for the second buffer based on the output signal.

    摘要翻译： 提供了一种方法，装置和计算机程序产品。 该装置根据第一时钟频率输出正弦信号，产生基于正弦信号的具有25％占空比的第一数字信号，产生基于正弦信号具有25％占空比的第二数字信号， 第一数字信号和第二数字信号，以产生具有50％占空比和第二时钟频率的组合数字信号，该第二时钟频率是第一时钟频率的两倍，并且使组合数字信号的第二时钟频率加倍，以产生具有 第三个时钟频率是第一个时钟频率的四倍。 该装置还基于输出信号产生用于第一缓冲器的第一控制电压和第二控制电压以及第二缓冲器的第三控制电压。

    Low-power RX synthesizer sharing TX hardware
    5.
    发明授权
    Low-power RX synthesizer sharing TX hardware 有权
    低功耗RX合成器共享TX硬件

    公开(公告)号：US09258021B1

    公开(公告)日：2016-02-09

    申请号：US14607775

    申请日：2015-01-28

    申请人： QUALCOMM Incorporated

    发明人： Yashar Rajavi ,  Alireza Khalili ,  Muhammad Adnan

    IPC分类号： H04B1/40 ,  H04B1/04

    CPC分类号： H04W52/028 ,  H04B1/403 ,  Y02D70/00 ,  Y02D70/142 ,  Y02D70/40

    摘要： An analog front-end (AFE) for a communications device includes a low-power frequency synthesizer with reduced footprint. The AFE includes a first frequency synthesizer and a second frequency synthesizer. The first frequency synthesizer is coupled to a transmit (TX) chain and to a receive (RX) chain of the AFE. The first frequency synthesizer is to generate a first local oscillator (LO) signal for transmitting or receiving carrier signals when the device is in a normal operating mode. The second frequency synthesizer is coupled to the RX chain and shares one or more components of the TX chain. The second frequency synthesizer is to utilize the one or more shared components to generate a second LO signal for receiving carrier signals when the device operates in a low-power mode. For example, the one or more shared components may include a voltage source and/or one or more inductors.

    摘要翻译： 用于通信设备的模拟前端（AFE）包括具有减小占位面积的低功率频率合成器。 AFE包括第一频率合成器和第二频率合成器。 第一个频率合成器耦合到AFE的发送（TX）链和接收（RX）链。 当第一频率合成器处于正常操作模式时，产生用于发送或接收载波信号的第一本地振荡器（LO）信号。 第二频率合成器耦合到RX链并共享TX链的一个或多个组件。 第二频率合成器是利用一个或多个共享分量来产生第二LO信号，用于在设备以低功率模式工作时接收载波信号。 例如，一个或多个共享组件可以包括电压源和/或一个或多个电感器。

    TEMPERATURE COMPENSATED RF PEAK DETECTOR
    7.
    发明申请
    TEMPERATURE COMPENSATED RF PEAK DETECTOR 有权
    温度补偿射频探测器

    公开(公告)号：US20150017922A1

    公开(公告)日：2015-01-15

    申请号：US13939076

    申请日：2013-07-10

    申请人： QUALCOMM Incorporated

    发明人： Yashar Rajavi ,  Shahram Abdollahi-Alibeik

    IPC分类号： H04B17/00

    CPC分类号： H04B17/318 ,  G01R21/01 ,  H04B17/104 ,  H04B17/11 ,  H04B17/16 ,  H04B17/345

    摘要： A temperature compensated RF peak detector is disclosed. In an exemplary embodiment, an apparatus includes a first RF peak detector configured to generate a reference signal, a temperature compensated threshold generator configured to generate a temperature compensated detection threshold based on the reference signal, and a comparator configured to generate a peak detection output based on the temperature compensated detection threshold.

    摘要翻译： 公开了一种温度补偿RF峰值检测器。 在示例性实施例中，一种装置包括被配置为产生参考信号的第一RF峰值检测器，被配置为基于参考信号产生温度补偿检测阈值的温度补偿阈值发生器，以及配置成基于参考信号产生基于峰值检测输出的比较器 对温度补偿检测阈值。

    Low-power balanced crystal oscillator
    9.
    发明授权
    Low-power balanced crystal oscillator 有权
    低功耗平衡晶体振荡器

    公开(公告)号：US09531323B1

    公开(公告)日：2016-12-27

    申请号：US14748946

    申请日：2015-06-24

    申请人： QUALCOMM Incorporated

    发明人： Alireza Khalili ,  Yashar Rajavi ,  Mazhareddin Taghivand

    IPC分类号： H03B5/32 ,  H03B5/36

    CPC分类号： H03B5/364 ,  H03B5/1212 ,  H03B5/1228 ,  H03B2200/0036 ,  H03B2200/0082

    摘要： A circuit includes: first and second output terminals; a reference resonator coupled between the first and second output terminals; a cross-coupled oscillation unit coupled to the first and second output terminals; a first MOSFET diode coupled to the cross-coupled oscillation unit, the first MOSFET diode including a first transistor, a first resistor coupled between gate and drain terminals of the first transistor, and a first capacitor; a second MOSFET diode coupled to the cross-coupled oscillation unit, the second MOSFET diode including a second transistor, a second resistor coupled between gate and drain terminals of the second transistor, and a second capacitor cross coupled between the drain terminal of the second transistor and the gate terminal of the first transistor, wherein the first capacitor is cross coupled between the drain terminal of the first transistor and the gate terminal of the second transistor.

    摘要翻译： 电路包括：第一和第二输出端子; 耦合在所述第一和第二输出端子之间的参考谐振器; 耦合到所述第一和第二输出端子的交叉耦合振荡单元; 耦合到所述交叉耦合振荡单元的第一MOSFET二极管，所述第一MOSFET二极管包括第一晶体管，耦合在所述第一晶体管的栅极和漏极端子之间的第一电阻器和第一电容器; 耦合到交叉耦合振荡单元的第二MOSFET二极管，所述第二MOSFET二极管包括第二晶体管，耦合在所述第二晶体管的栅极和漏极端子之间的第二电阻器以及耦合在所述第二晶体管的漏极端子之间的第二电容器 和第一晶体管的栅极端子，其中第一电容器交叉耦合在第一晶体管的漏极端子和第二晶体管的栅极端子之间。

    ACTIVE NOTCH FILTER
    10.
    发明申请
    ACTIVE NOTCH FILTER 有权
    主动插槽过滤器

    公开(公告)号：US20160336915A1

    公开(公告)日：2016-11-17

    申请号：US14709897

    申请日：2015-05-12

    申请人： QUALCOMM Incorporated

    发明人： Amirpouya Kavousian ,  Yashar Rajavi ,  Alireza Khalili ,  Mohammad Bagher Vahid Far

    IPC分类号： H04B3/04 ,  H03H7/01 ,  H03H7/06

    CPC分类号： H03H7/0123 ,  H03F1/347 ,  H03F1/565 ,  H03F3/245 ,  H03F2200/321 ,  H03F2200/451 ,  H03H7/0153 ,  H03H7/06 ,  H03H7/09 ,  H03H7/1741 ,  H03H7/46 ,  H03H2007/013 ,  H04B1/18

    摘要： A method and apparatus are disclosed for filtering a signal, such as a transmit communication signal with a configurable notch filter. The configurable notch filter may attenuate a set of frequencies near a selected notch frequency. In some embodiments, the configurable notch filter may include a variable resistor, a variable capacitor, a first inductor, and a second inductor. The variable resistor may be configured to compensate for resistive losses within the configurable notch filter. The variable capacitor may be configured to determine the set of frequencies to be attenuated.

    摘要翻译： 公开了一种用于对诸如具有可配置陷波滤波器的发射通信信号的信号进行滤波的方法和装置。 可配置的陷波滤波器可以衰减所选陷波频率附近的一组频率。 在一些实施例中，可配置陷波滤波器可以包括可变电阻器，可变电容器，第一电感器和第二电感器。 可变电阻器可以被配置为补偿可配置陷波滤波器内的电阻损耗。 可变电容器可以被配置为确定要衰减的频率集合。