公开(公告)号：US20190051495A1

公开(公告)日：2019-02-14

申请号：US15879371

申请日：2018-01-24

申请人： Qiwei Liang ,  Jie Zhou ,  Adib M. Khan ,  Gautam Pisharody ,  Guannan Chen ,  Chentsau Ying ,  Srinivas D. Nemani

发明人： Qiwei Liang ,  Jie Zhou ,  Adib M. Khan ,  Gautam Pisharody ,  Guannan Chen ,  Chentsau Ying ,  Srinivas D. Nemani

IPC分类号： H01J37/32 ,  C23C16/511 ,  H05H1/46 ,  C23C16/26

摘要： A plasma reactor for processing a workpiece includes a chamber having a dielectric window, a workpiece support to hold a workpiece in the chamber, a rotary coupling comprising a stationary stage configured to be coupled to a microwave source and a rotatable stage having an axis of rotation, a microwave antenna and overlying the dielectric window of the chamber, a rotary actuator to rotate the microwave antenna, and a process gas distributor including a gas distribution ring surrounding the workpiece support. The microwave antenna includes at least one conduit coupled to the rotary stage. The gas distribution ring including a cylindrical chamber liner separating a circular conduit from the chamber and a plurality of apertures extending radially through the liner to connect the conduit to the chamber.

公开(公告)号：US06919168B2

公开(公告)日：2005-07-19

申请号：US10057674

申请日：2002-01-24

申请人： Jeng H. Hwang ,  Steve S. Y. Mak ,  True-Lon Lin ,  Chentsau Ying ,  John W. Schaller

发明人： Jeng H. Hwang ,  Steve S. Y. Mak ,  True-Lon Lin ,  Chentsau Ying ,  John W. Schaller

IPC分类号： C23F4/00 ,  H01L21/02 ,  H01L21/3213 ,  G03F7/00 ,  G03F7/36

CPC分类号： H01L28/60 ,  C23F4/00 ,  H01L21/32136 ,  H01L21/32139

摘要： A method of etching a noble metal electrode layer disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.35 μm and having a noble metal profile equal to or greater than about 80°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the noble metal electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising a gas selected from the group consisting of nitrogen, oxygen, a halogen (e.g., chlorine), argon, and a gas selected from the group consisting of BCl3, HBr, and SiCl4 mixtures thereof. Masking methods and etching sequences for patterning high density RAM capacitors are also provided.

摘要翻译： 一种蚀刻设置在基板上的贵金属电极层的方法，以制造半导体器件，该半导体器件包括间隔等于或小于约0.35μm并且具有等于或大于约80°的贵金属形状的多个电极。 该方法包括将衬底加热到​​大于约150℃的温度，并且通过采用蚀刻剂气体的高密度电感耦合等离子体蚀刻贵金属电极层，所述等离子体包括选自氮，氧， 卤素（例如氯），氩气和选自BCl 3，HBr和SiCl 4+混合物的气体。 还提供了用于图案化高密度RAM电容器的掩模方法和蚀刻顺序。

公开(公告)号：US06749770B2

公开(公告)日：2004-06-15

申请号：US09948028

申请日：2001-09-05

申请人： Jeng H. Hwang ,  Chentsau Ying ,  Kang-Lie Chiang ,  Steve S. Y. Mak

发明人： Jeng H. Hwang ,  Chentsau Ying ,  Kang-Lie Chiang ,  Steve S. Y. Mak

IPC分类号： C09K1300

CPC分类号： H01L28/60 ,  C23F4/00 ,  H01L21/32136 ,  H01L21/32139

摘要： A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl3, HBr, SiCl4 and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 Å.

摘要翻译： 一种蚀刻设置在基板上的铂电极层的方法，以制造包括多个铂电极的半导体器件。 该方法包括将衬底加热到​​大于约150℃的温度，并且通过使用包含氮和卤素（例如氯）的蚀刻剂气体的等离子体和选自以下的气体来蚀刻铂电极层： 惰性气体（例如氩气），BCl 3，HBr，SiCl 4及其混合物。 衬底可以在具有介电窗口的反应器室中加热，所述电介质窗口包括具有表面光洁度的沉积物接收表面，所述沉积物接收表面包括具有大于约的平均高度值的峰 - 谷粗糙度高度。

公开(公告)号：US20080102640A1

公开(公告)日：2008-05-01

申请号：US11554425

申请日：2006-10-30

申请人： Sajjad Amin Hassan ,  Chentsau Ying

发明人： Sajjad Amin Hassan ,  Chentsau Ying

IPC分类号： H01L21/461 ,  C23C16/00

CPC分类号： H01L21/67069 ,  H01L21/31116

摘要： A substrate comprising an oxide layer covering a nitride layer, is etched in a process zone of a substrate processing chamber. A process gas comprising H2 gas is introduced into the process zone, and the process gas is energized to etch through the oxide layer to at least partially expose the nitride layer. The energized process gas has a selectivity of etching the oxide layer to the nitride layer of at least about 25:1.

摘要翻译： 包括覆盖氮化物层的氧化物层的衬底在衬底处理室的处理区中被蚀刻。 将包含H 2气体的工艺气体引入工艺区域，并且对工艺气体进行通电以蚀刻通过氧化物层至少部分地暴露氮化物层。 赋能的工艺气体具有至少约25:1蚀刻氮化物层的氧化物层的选择性。

公开(公告)号：US06265318B1

公开(公告)日：2001-07-24

申请号：US09251633

申请日：1999-02-17

申请人： Jeng H. Hwang ,  Chentsau Ying ,  Guang Xiang Jin ,  Steve S. Y. Mak

发明人： Jeng H. Hwang ,  Chentsau Ying ,  Guang Xiang Jin ,  Steve S. Y. Mak

IPC分类号： H01L2100

CPC分类号： H01L28/60 ,  C23F4/00 ,  H01L21/32136 ,  H01L21/32139

摘要： A method of etching an electrode layer (e.g., a platinum electrode layer or an iridium electrode layer) disposed on a substrate to produce a semiconductor device including a plurality of electrodes separated by a distance equal to or less than about 0.3 &mgr;m and having a profile equal to or greater than about 85°. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the electrode layer by employing a high density inductively coupled plasma of an etchant gas comprising oxygen and/or chlorine, argon and a gas selected from the group consisting of BCl3, HBr, HCl and mixtures thereof. A semiconductor device having a substrate and a plurality of electrodes supported by the substrate. The electrodes have a dimension (e.g., a width) which include a value equal to or less than about 0.3 &mgr;m and a profile equal to or greater than about 85°.

摘要翻译： 一种蚀刻设置在基板上的电极层（例如，铂电极层或铱电极层）的方法，以制造半导体器件，该半导体器件包括间隔等于或小于约0.3μm的多个电极，并具有轮廓 等于或大于约85°。 该方法包括将衬底加热到​​大于约150℃的温度，并且通过采用包含氧和/或氯，氩和选自以下的气体的气体的高密度电感耦合等离子体来蚀刻电极层： 的BCl 3，HBr，HCl及其混合物。 一种半导体器件，具有基板和由基板支撑的多个电极。 电极具有包括等于或小于约0.3μm的值和等于或大于约85°的轮廓的尺寸（例如，宽度）。

公开(公告)号：US06984585B2

公开(公告)日：2006-01-10

申请号：US10218473

申请日：2002-08-12

申请人： Chentsau Ying ,  Xiaoyi Chen ,  Padmapani C. Nallan ,  Ajay Kumar

发明人： Chentsau Ying ,  Xiaoyi Chen ,  Padmapani C. Nallan ,  Ajay Kumar

IPC分类号： H01L21/302

CPC分类号： H01L21/02071 ,  B82Y25/00 ,  B82Y40/00 ,  H01F41/308 ,  H01L21/31133 ,  H01L21/32136 ,  H01L21/32139 ,  H01L43/12

摘要： A method for removal of residues after plasma etching a film stack comprising a first layer and a sacrificial layer. The method treats a substrate containing the film stack after the first layer of the film stack has been etched to remove residue produced during the etching process. The treatment is performed in a buffered oxide etch wet dip solution that removes the residue and the sacrificial layer.

摘要翻译： 一种用于在等离子体蚀刻包括第一层和牺牲层的薄膜堆叠之后去除残余物的方法。 在蚀刻第一层薄膜叠层之后，该方法处理含有薄膜叠层的基板，以除去在蚀刻过程中产生的残留物。 处理在缓冲氧化物蚀刻湿浸液中进行，其去除残余物和牺牲层。

公开(公告)号：US06942813B2

公开(公告)日：2005-09-13

申请号：US10382964

申请日：2003-03-05

申请人： Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar ,  Xiaoyi Chen

发明人： Chentsau Ying ,  Padmapani C. Nallan ,  Ajay Kumar ,  Xiaoyi Chen

IPC分类号： C23F4/00 ,  H01F41/30 ,  H01L21/311 ,  H01L21/3213 ,  H01L21/8246 ,  B44C1/22 ,  H01L21/00

CPC分类号： H01F41/308 ,  B82Y10/00 ,  B82Y25/00 ,  B82Y40/00 ,  C23F4/00 ,  H01F41/301 ,  H01J2237/3348 ,  H01L21/31122 ,  H01L21/32136 ,  H01L27/228 ,  H01L43/12

摘要： A method for etching magnetic and ferroelectric materials using a pulsed substrate biasing technique (PSBT) that applies a plurality of processing cycles to the substrate, where each cycle comprises a period of plasma etching without substrate bias and a period of plasma etching with the substrate bias. In exemplary applications, the method is used for fabricating magneto-resistive random access memory (MRAM) and ferroelectric random access memory (FeRAM) devices.

摘要翻译： 一种使用向基板施加多个处理循环的脉冲衬底偏置技术（PSBT）蚀刻磁性和铁电材料的方法，其中每个循环包括没有衬底偏压的等离子体蚀刻周期和具有衬底偏置的等离子体蚀刻周期 。 在示例性应用中，该方法用于制造磁阻随机存取存储器（MRAM）和铁电随机存取存储器（FeRAM）器件。

公开(公告)号：US06933239B2

公开(公告)日：2005-08-23

申请号：US10342087

申请日：2003-01-13

申请人： Chentsau Ying ,  Xiaoyi Chen ,  Chun Yan ,  Ajay Kumar

发明人： Chentsau Ying ,  Xiaoyi Chen ,  Chun Yan ,  Ajay Kumar

IPC分类号： H01L21/3213 ,  H01L21/302

CPC分类号： H01L43/12 ,  H01L21/32136

摘要： A method for removing conductive residue from a layer on a semiconductor substrate by exposing the substrate to a gas comprising a fluorine containing gas and a hydrogen containing gas. In one embodiment, the gas is excited to form a plasma that removes the conductive residue during fabrication of a magneto-resistive random access memory (MRAM) device.

摘要翻译： 一种通过将衬底暴露于包含含氟气体和含氢气体的气体从半导体衬底上的层去除导电残留物的方法。 在一个实施例中，气体被激发以形成在制造磁阻随机存取存储器（MRAM）器件期间除去导电残留物的等离子体。

公开(公告)号：US06579796B2

公开(公告)日：2003-06-17

申请号：US10013605

申请日：2001-12-10

申请人： Chentsau Ying ,  Jeng H. Hwang ,  Luc Van Autryve

发明人： Chentsau Ying ,  Jeng H. Hwang ,  Luc Van Autryve

IPC分类号： H01L21302

CPC分类号： H01J37/32862 ,  H01L21/32136 ,  H01L21/32139 ,  Y10S438/905

摘要： Disclosed herein is a method of etching platinum using a silicon carbide mask. The method comprises providing an etch stack including a patterned silicon carbide layer overlying a layer of platinum, then pattern etching the platinum layer using a plasma generated from a source gas comprising Cl2, BCl3, and a nonreactive, diluent gas. The silicon carbide mask can be deposited and patterned using standard industry techniques, and can be easily removed without damaging either the platinum or an underlying doped substrate material. The method provides a smooth platinum etch profile and an etch profile angle of about 75° to about 90°. Also disclosed herein are methods of forming semiconductor structures useful in the preparation of DRAM and FeRAM cells.

摘要翻译： 本文公开了使用碳化硅掩模蚀刻铂的方法。 该方法包括提供包括覆盖铂层的图案化碳化硅层的蚀刻堆叠，然后使用由包含Cl 2，BCl 3和非反应性稀释气体的源气体产生的等离子体来刻蚀铂层。 可以使用标准工业技术沉积和图案化碳化硅掩模，并且可以容易地去除碳化硅掩模，而不会损坏铂或下掺杂的衬底材料。 该方法提供平滑的铂蚀刻轮廓和约75°至约90°的蚀刻轮廓角。 本文还公开了形成用于制备DRAM和FeRAM单元的半导体结构的方法。

公开(公告)号：US06323132B1

公开(公告)日：2001-11-27

申请号：US09251826

申请日：1999-02-17

申请人： Jeng H. Hwang ,  Chentsau Ying ,  Kang-Lie Chiang ,  Steve S. Y. Mak

发明人： Jeng H. Hwang ,  Chentsau Ying ,  Kang-Lie Chiang ,  Steve S. Y. Mak

IPC分类号： H01L21302

CPC分类号： H01L28/60 ,  C23F4/00 ,  H01L21/32136 ,  H01L21/32139

摘要： A method of etching a platinum electrode layer disposed on a substrate to produce a semiconductor device including a plurality of platinum electrodes. The method comprises heating the substrate to a temperature greater than about 150° C., and etching the platinum electrode layer by employing a plasma of an etchant gas comprising nitrogen and a halogen (e.g. chlorine), and a gas selected from the group consisting of a noble gas (e.g. argon), BCl3, HBr, SiCl4 and mixtures thereof. The substrate may be heated in a reactor chamber having a dielectric window including a deposit-receiving surface having a surface finish comprising a peak-to-valley roughness height with an average height value of greater than about 1000 Å.

摘要翻译： 一种蚀刻设置在基板上的铂电极层的方法，以制造包括多个铂电极的半导体器件。 该方法包括将衬底加热到​​大于约150℃的温度，并且通过使用包含氮和卤素（例如氯）的蚀刻剂气体的等离子体和选自以下的气体来蚀刻铂电极层： 惰性气体（例如氩气），BCl 3，HBr，SiCl 4及其混合物。 衬底可以在具有介电窗口的反应器室中加热，所述电介质窗口包括具有表面光洁度的沉积物接收表面，所述沉积物接收表面包括具有大于约的平均高度值的峰 - 谷粗糙度高度。