公开(公告)号：US20140357047A1

公开(公告)日：2014-12-04

申请号：US14458976

申请日：2014-08-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Jun KAWAHARA ,  Naoya INOUE ,  Naoya FURUTAKE ,  Yoshihiro HAYASHI

IPC: H01L49/02

CPC classification number: H01L28/24 ,  H01L23/5228 ,  H01L27/0629 ,  H01L27/0802 ,  H01L2924/0002 ,  Y10S257/904 ,  H01L2924/00

Abstract: A semiconductor device includes a first insulating layer (interlayer insulating layer), a resistive element that is disposed over the first insulating layer (interlayer insulating layer) and at least a surface layer of which is a TaSiN layer, and an interlayer insulating layer disposed over the first insulating layer (interlayer insulating layer) and the resistive element. Multiple via plugs having ends coupled to the TaSiN layer are disposed in the interlayer insulating layer.

Abstract translation: 半导体器件包括：第一绝缘层（层间绝缘层），设置在第一绝缘层（层间绝缘层）上的电阻元件，至少其表面层为TaSiN层;以及层间绝缘层， 第一绝缘层（层间绝缘层）和电阻元件。 在层间绝缘层中设置多个具有与TaSiN层结合的端子的通孔塞。

公开(公告)号：US20130168817A1

公开(公告)日：2013-07-04

申请号：US13670138

申请日：2012-11-06

Applicant: Renesas Electronics Corporation

Inventor： Jun KAWAHARA ,  Naoya INOUE ,  Naoya FURUTAKE ,  Yoshihiro HAYASHI

IPC: H01L49/02

CPC classification number: H01L28/24 ,  H01L23/5228 ,  H01L27/0629 ,  H01L27/0802 ,  H01L2924/0002 ,  Y10S257/904 ,  H01L2924/00

Abstract: A semiconductor device includes a first insulating layer (interlayer insulating layer), a resistive element that is disposed over the first insulating layer (interlayer insulating layer) and at least a surface layer of which is a TaSiN layer, and an interlayer insulating layer disposed over the first insulating layer (interlayer insulating layer) and the resistive element. Multiple via plugs having ends coupled to the TaSiN layer are disposed in the interlayer insulating layer.

Abstract translation: 半导体器件包括：第一绝缘层（层间绝缘层），设置在第一绝缘层（层间绝缘层）上的电阻元件，至少其表面层为TaSiN层;以及层间绝缘层， 第一绝缘层（层间绝缘层）和电阻元件。 在层间绝缘层中设置多个具有与TaSiN层结合的端子的通孔塞。

公开(公告)号：US20130105772A1

公开(公告)日：2013-05-02

申请号：US13659461

申请日：2012-10-24

Applicant: Renesas Electronics Corporation

Inventor： Jun KAWAHARA ,  Yoshihiro HAYASHI

IPC: C08G77/20 ,  H01L51/30 ,  H01L51/05

CPC classification number: H01L51/0094 ,  C08G77/60 ,  C08G77/62 ,  H01L51/004 ,  H01L51/0079 ,  H01L51/0541 ,  H01L51/0545

Abstract: A semiconductor device containing a novel cyclosiloxane polymer showing electroconductivity or semiconductivity has a charge transport layer comprising a plasma polymer containing structural units (A) each having a transition metal as a central metal and structural units (B) each situated between structural units (A) adjacent to each other and having a cyclosiloxane skeleton. The charge transport layer is formed by plasma polymerization of an organic metal compound having the transition metal as the central metal and the cyclosiloxane compound in a reactor.

Abstract translation: 包含显示导电性或半导电性的新型环硅氧烷聚合物的半导体器件具有电荷输送层，其包含含有各自具有作为中心金属的过渡金属的结构单元（A）的等离子体聚合物和各自位于结构单元（A）之间的结构单元（B） 相邻并具有环硅氧烷骨架。 电荷输送层通过在反应器中等离子体化具有作为中心金属的过渡金属和环硅氧烷化合物的有机金属化合物形成。

公开(公告)号：US20160005792A1

公开(公告)日：2016-01-07

申请号：US14750060

申请日：2015-06-25

Applicant: Renesas Electronics Corporation

Inventor： Makoto UEKI ,  Nobuyuki IKARASHI ,  Jun KAWAHARA ,  Kiyoshi TAKEUCHI ,  Takashi HASE

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1658

Abstract: Provided is a semiconductor memory device (resistance random access memory element) improved in properties. A Ru film is formed as a film of a lower electrode by sputtering, and a Ta film is formed thereonto by sputtering. Next, the Ta film is oxidized with plasma to oxidize the Ta film. In this way, a compound Ta2O5 is produced and further Ru is diffused into the compound to form a layer (variable resistance layer) in which Ru is diffused into the compound Ta2O5. Such an incorporation of a metal (such as Ru) into a transition metal oxide TMO (such as Ta2O5) makes it possible to form electron conductive paths additional to filaments to lower the filaments in density and thickness. Thus, the memory element can be restrained from undergoing OFF-fixation, by which the element is not easily lowered in resistance, to be improved in ON-properties.

Abstract translation: 提供了一种改进了性能的半导体存储器件（电阻随机存取存储元件）。 通过溅射形成作为下电极的膜的Ru膜，并通过溅射在其上形成Ta膜。 接着，用等离子体氧化Ta膜，氧化Ta膜。 以这种方式，产生化合物Ta 2 O 5，并且进一步将Ru扩散到化合物中以形成其中Ru扩散到化合物Ta 2 O 5中的层（可变电阻层）。 金属（例如Ru）的这种引入到过渡金属氧化物TMO（例如Ta 2 O 5）中使得有可能形成除了长丝之外的电子传导路径以降低细丝的密度和厚度。 因此，可以抑制存储元件的导通性能的提高，使得元件不易于降低电阻的非固定。