公开(公告)号：US20180152829A1

公开(公告)日：2018-05-31

申请号：US15719530

申请日：2017-09-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Taku FUJIWARA ,  Yoshihiro HAYASHI

IPC: H04W8/00 ,  H04W76/02

CPC classification number: H04W8/005 ,  H04W76/11

Abstract: A wireless communication apparatus includes a communication controller and an identification information setup portion. The communication controller establishes first communication, namely, communication with a first wireless communication apparatus having identification information already set and receives first information, namely, information to settle the identification information to be set, from the first wireless communication apparatus. The identification information setup portion sets the identification information for the wireless communication apparatus based on the first information. After setting the identification information, the communication controller establishes second communication, namely, communication with a second wireless communication apparatus having identification information not set yet, and transmits second information, namely, information to settle the identification information to be set for the second wireless communication apparatus, to the second wireless communication apparatus. The communication controller transmits the second information to one second wireless communication apparatus and subsequently does not transmit the second information.

公开(公告)号：US20160172354A1

公开(公告)日：2016-06-16

申请号：US14995706

申请日：2016-01-14

Applicant: Renesas Electronics Corporation

Inventor： Kishou KANEKO ,  Naoya INOUE ,  Yoshihiro HAYASHI

IPC: H01L27/02 ,  H01L29/24 ,  H01L27/12 ,  H01L29/786

CPC classification number: H01L27/0285 ,  H01L23/522 ,  H01L23/5283 ,  H01L23/53295 ,  H01L23/552 ,  H01L27/0255 ,  H01L27/0296 ,  H01L27/0688 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/124 ,  H01L29/24 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: A semiconductor device includes a semiconductor substrate on which a semiconductor device is formed; first and second pads; a first insulating film which is formed above the semiconductor substrate; a plurality of wiring lines which are embedded in ditches provided in the first insulating film; a second insulating film provided to cover the first insulating film and the plurality of wiring lines; a semiconductor layer formed on the second insulating film; a source electrode connected with the semiconductor layer; and a drain electrode connected with the semiconductor layer. The plurality of wiring lines includes a gate electrode provided in a position which is opposite to the semiconductor layer. The semiconductor layer, the source electrode, the drain electrode and the gate electrode configure an ESD protection device to discharge a current by ESD surge from the first pad to the second pad.

Abstract translation: 半导体器件包括其上形成半导体器件的半导体衬底; 第一和第二垫; 形成在半导体衬底上的第一绝缘膜; 埋设在第一绝缘膜中的沟槽中的多条布线; 设置为覆盖所述第一绝缘膜和所述多条布线的第二绝缘膜; 形成在所述第二绝缘膜上的半导体层; 与半导体层连接的源电极; 以及与半导体层连接的漏电极。 多个布线包括设置在与半导体层相对的位置的栅电极。 半导体层，源电极，漏电极和栅电极构成ESD保护器件，以通过ESD浪涌从第一焊盘向第二焊盘放电。

公开(公告)号：US20140357047A1

公开(公告)日：2014-12-04

申请号：US14458976

申请日：2014-08-13

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Jun KAWAHARA ,  Naoya INOUE ,  Naoya FURUTAKE ,  Yoshihiro HAYASHI

IPC: H01L49/02

CPC classification number: H01L28/24 ,  H01L23/5228 ,  H01L27/0629 ,  H01L27/0802 ,  H01L2924/0002 ,  Y10S257/904 ,  H01L2924/00

Abstract: A semiconductor device includes a first insulating layer (interlayer insulating layer), a resistive element that is disposed over the first insulating layer (interlayer insulating layer) and at least a surface layer of which is a TaSiN layer, and an interlayer insulating layer disposed over the first insulating layer (interlayer insulating layer) and the resistive element. Multiple via plugs having ends coupled to the TaSiN layer are disposed in the interlayer insulating layer.

Abstract translation: 半导体器件包括：第一绝缘层（层间绝缘层），设置在第一绝缘层（层间绝缘层）上的电阻元件，至少其表面层为TaSiN层;以及层间绝缘层， 第一绝缘层（层间绝缘层）和电阻元件。 在层间绝缘层中设置多个具有与TaSiN层结合的端子的通孔塞。

公开(公告)号：US20130153887A1

公开(公告)日：2013-06-20

申请号：US13680757

申请日：2012-11-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Kishou KANEKO ,  Naoya INOUE ,  Yoshihiro HAYASHI

IPC: H01L27/088 ,  H01L29/66

CPC classification number: H01L27/1259 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02565 ,  H01L21/28 ,  H01L21/44 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/522 ,  H01L27/088 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/66477 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.

Abstract translation: 形成层间绝缘膜。 然后将第一栅电极和第二栅电极埋入层间绝缘膜中。 然后，在层间绝缘膜上方，在第一栅电极上方和第二栅电极上形成防扩散膜。 然后，在存在于第一栅电极上的抗扩散膜上形成第一半导体层。 然后，在第一半导体层的上表面和横向侧上以及反扩散膜之上形成绝缘覆盖膜。 然后，在绝缘覆盖膜上形成半导体膜。 然后，选择性地去除半导体膜以留下位于第二栅电极上的部分，从而形成第二半导体层。

公开(公告)号：US20180340765A1

公开(公告)日：2018-11-29

申请号：US15954675

申请日：2018-04-17

Applicant: Renesas Electronics Corporation

Inventor： Tatsuya SERIZAWA ,  Yoshihiro HAYASHI ,  Noriaki MATSUNO

IPC: G01B7/02 ,  G01R27/26

Abstract: To provide a wireless communication module that implements the function to detect a human body in a conserved space and is capable of detecting a proximity to human bodies with high accuracy. A wireless communication module includes an antenna unit and a proximity detector which detects that a human body has approached the module. The antenna unit includes an antenna and a first filter which is comprised of distributed constant elements. The proximity detector for human bodies uses the antenna and the first filter as an electrode to detect capacitance.

公开(公告)号：US20160365144A1

公开(公告)日：2016-12-15

申请号：US15099660

申请日：2016-04-15

Applicant: Renesas Electronics Corporation

Inventor： Makoto UEKI ,  Koji MASUZAKI ,  Masaharu MATSUDAIRA ,  Takashi HASE ,  Yoshihiro HAYASHI

IPC: G11C13/00

CPC classification number: G11C13/0069 ,  G11C13/004 ,  G11C13/0064 ,  G11C2013/0066 ,  G11C2013/0073 ,  G11C2013/0092 ,  G11C2213/79 ,  G11C2213/82

Abstract: Included are memory cells each including a resistance change element and a control circuit. The circuit performs an On writing process for applying, to the memory cell, an On writing pulse for the cell to be in a resistance state where a resistance value of the resistance change element is lower than a first reference value and an Off writing process for applying an Off writing pulse with an opposite polarity to the On writing pulse for a high resistance state with a second reference value or greater. The circuit applies, in the On writing process, a trial pulse having the same polarity as that of the On writing pulse and having the pulse width shorter than that of the On writing pulse and a reset pulse having the same polarity as that of the On writing pulse, in this order before applying the On writing pulse to the cell.

Abstract translation: 包括各自包括电阻变化元件和控制电路的存储单元。 该电路执行On写入处理，以将存储单元中的On写入脉冲施加在电阻变化元件的电阻值低于第一基准值的电阻状态，以及用于 对具有第二参考值或更高的高电阻状态的ON写入脉冲施加具有相反极性的OFF写入脉冲。 该电路在On写入处理中应用与On写入脉冲具有相同极性的试用脉冲，其脉冲宽度短于On写入脉冲的脉冲宽度，并且具有与On 写入脉冲，按此顺序将“写入”脉冲应用于单元格。

公开(公告)号：US20160027925A1

公开(公告)日：2016-01-28

申请号：US14875747

申请日：2015-10-06

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Hiroshi SUNAMURA ,  Kishou KANEKO ,  Naoya FURUTAKE ,  Shinobu SAITOU ,  Yoshihiro HAYASHI

IPC: H01L29/786 ,  H01L27/092

CPC classification number: H01L27/1225 ,  H01L21/477 ,  H01L21/8254 ,  H01L27/0922 ,  H01L27/124 ,  H01L27/1259 ,  H01L29/24 ,  H01L29/242 ,  H01L29/42356 ,  H01L29/66969 ,  H01L29/7869 ,  H01L29/812

Abstract: A semiconductor device has a p-type metal oxide semiconductor layer; a source electrode connected with the p-type metal oxide semiconductor layer; a drain electrode connected with the p-type metal oxide semiconductor layer; and a gate electrode arranged to oppose to a part of the p-type metal oxide semiconductor layer. The gate electrode and the drain electrode are separated from each other in a top view.

Abstract translation: 半导体器件具有p型金属氧化物半导体层; 与p型金属氧化物半导体层连接的源电极; 与p型金属氧化物半导体层连接的漏电极; 以及与p型金属氧化物半导体层的一部分相对配置的栅电极。 栅电极和漏电极在顶视图中彼此分离。

公开(公告)号：US20190165933A1

公开(公告)日：2019-05-30

申请号：US16146794

申请日：2018-09-28

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Satoru TOMISAWA ,  Yoshihiro HAYASHI ,  Yuichi MARUYAMA ,  Hideyuki WAKADA

IPC: H04L9/08

Abstract: A secure communication system is provided, in which a common cryptographic key is generated using the biological information simultaneously acquirable by multiple communication devices. The communication system includes multiple separated communication devices. The communication device generates the same common key based on the feature element of simultaneously acquirable biological information, and performs encryption and decryption using the common key. The communication device includes a biological information acquiring unit to acquire the feature element of the biological information; a common key generation unit to generate the common key; an encryption/decryption unit to encrypt transmit information and to decrypt receive information with the common key; and a communication unit to receive the transmit information and to transmit the receive information.

公开(公告)号：US20170133434A1

公开(公告)日：2017-05-11

申请号：US15334846

申请日：2016-10-26

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Makoto UEKI ,  Koji MASUZAKI ,  Takashi HASE ,  Yoshihiro HAYASHI

IPC: H01L27/24 ,  H01L45/00

CPC classification number: H01L27/2481 ,  H01L27/2436 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1253 ,  H01L45/145 ,  H01L45/146 ,  H01L45/1608 ,  H01L45/1625 ,  H01L45/1633

Abstract: A semiconductor device has a resistance change element that is high in the holding resistance of a low resistance (On) state while securing a memory window. In a resistance random access memory including selection transistors and resistance change elements coupled in series to the selection transistors, the resistance change element uses a lower electrode that applies a positive voltage when being transited to a high resistance (Off) state, an upper electrode that faces the lower electrode, and a resistance change layer that is sandwiched between the lower electrode and the upper electrode and that uses an oxide of transition metal. The resistance change layer contains nitrogen. The concentration of nitrogen on the lower electrode side is higher than that on the upper electrode side. The nitrogen in the resistance change layer exhibits a concentration gradient continuously declined from the lower electrode side to the upper electrode side.

公开(公告)号：US20150171120A1

公开(公告)日：2015-06-18

申请号：US14633791

申请日：2015-02-27

Applicant: Renesas Electronics Corporation

Inventor： Kishou KANEKO ,  Naoya INOUE ,  Yoshihiro HAYASHI

IPC: H01L27/12 ,  H01L29/786 ,  H01L29/49 ,  H01L21/465 ,  H01L21/4763 ,  H01L21/02 ,  H01L29/66 ,  H01L21/44

CPC classification number: H01L27/1259 ,  H01L21/0214 ,  H01L21/02164 ,  H01L21/02167 ,  H01L21/0217 ,  H01L21/02565 ,  H01L21/28 ,  H01L21/44 ,  H01L21/465 ,  H01L21/47635 ,  H01L23/522 ,  H01L27/088 ,  H01L27/1218 ,  H01L27/1225 ,  H01L27/1237 ,  H01L27/124 ,  H01L27/1251 ,  H01L29/4908 ,  H01L29/495 ,  H01L29/66477 ,  H01L29/66969 ,  H01L29/7869 ,  H01L2924/0002 ,  H01L2924/00

Abstract: An interlayer insulating film is formed. Then a first gate electrode and a second gate electrode are buried in the interlayer insulating film. Then, an anti-diffusion film is formed over the interlayer insulating film, over the first gate electrode, and over the second gate electrode. Then, a first semiconductor layer is formed over the anti-diffusion film which is present over the first gate electrode. Then, an insulating cover film is formed over the upper surface and on the lateral side of the first semiconductor layer and over the anti-diffusion film. Then, a semiconductor film is formed over the insulating cover film. Then, the semiconductor film is removed selectively to leave a portion positioned over the second gate electrode, thereby forming a second semiconductor layer.

Abstract translation: 形成层间绝缘膜。 然后将第一栅电极和第二栅电极埋入层间绝缘膜中。 然后，在层间绝缘膜上方，在第一栅电极上方和第二栅电极上形成防扩散膜。 然后，在存在于第一栅电极上的抗扩散膜上形成第一半导体层。 然后，在第一半导体层的上表面和横向侧上以及反扩散膜之上形成绝缘覆盖膜。 然后，在绝缘覆盖膜上形成半导体膜。 然后，选择性地去除半导体膜以留下位于第二栅电极上的部分，从而形成第二半导体层。