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公开(公告)号：US10084400B2
公开(公告)日：2018-09-25
申请号：US15266936
申请日：2016-09-15
Applicant: Renesas Electronics Corporation
Inventor： Minoru Kurosawa , Kichiya Itagaki
CPC classification number: H02P6/182 , G11B19/20 , G11B19/2054 , G11B19/2072 , H02P21/22 , H02P27/08
Abstract: The phase of a drive current of a motor is optimized. The phase arithmetic unit PHCAL calculates a drive voltage phase θdrv to converge the phase difference between the reference voltage phase θbemf and the reference current phase θi to zero based on a prescribed arithmetic expression. The phase correction unit PHCP determines the phase θdrvR after the correction by adding a correction value to the phase θdrv, and the magnitude of the correction value is updated by a feedback control so as to converge to a prescribed value the phase difference between the reference voltage phase θbemf and the reference current phase θi which are inputted. A PWM controller shifts an energization control timing synchronized with the reference voltage phase θbemf based on the corrected phase θdrvR, and generates the PWM signal for controlling the drive voltage to a sine wave shape.
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公开(公告)号：US09503011B2
公开(公告)日：2016-11-22
申请号：US14946671
申请日：2015-11-19
Applicant: Renesas Electronics Corporation
Inventor： Minoru Kurosawa , Kichiya Itagaki , Seigi Ishiji
CPC classification number: H02P23/0077 , H02P6/10 , H02P29/00 , H02P29/50
Abstract: The present invention is intended to reduce noise and vibration of a motor. A first duty correction circuit generates a first corrected duty instruction value which changes with an increment same as an increment of a duty instruction value and in which an offset value as a constant is reflected. A second duty correction circuit generates a second corrected duty instruction value which changes with an increment different from an increment of the duty instruction value. A selector outputs, as the corrected duty instruction value, either one of the first corrected duty instruction value and the second corrected duty instruction value in accordance with a magnitude relation between the duty instruction value and a duty reference value.
Abstract translation: 本发明旨在减少电动机的噪声和振动。 第一占空比校正电路产生第一校正占空指令值，其以与占空指令值的增量相同的增量变化，并且其中反映作为常数的偏移值。 第二占空比校正电路产生以与占空指令值的增量不同的增量改变的第二校正占空比指令值。 A选择器根据占空指令值和占空比基准值之间的大小关系，输出第一校正占空指令值和第二校正占空指令值中的任何一个作为校正占空指令值。
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公开(公告)号：US10784801B2
公开(公告)日：2020-09-22
申请号：US16400946
申请日：2019-05-01
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Minoru Kurosawa , Kichiya Itagaki
Abstract: The phase error detection unit PHED detects the phase error PERR between the phase of the BEMF and the phase of the phase switching signal COMM (masking signal MSK) at each of a plurality of detection timings that become the zero crossing timings of the BEMF in the mechanical angular cycle. The PI compensator PICPa has a plurality of cycle setting registers REGN 0_0 to REGN 3_5 for each of a plurality of detection timings, and while switching the registers for each detection timing, the PI compensator determines the cycle setting value NCNTS for bringing the inputted phase error PERR close to zero by reflecting the previous cycle setting value NCNT stored in the register. The clock generation unit CGEN sequentially controls the phase switching signal COMM based on the cycle setting value NCNTS.
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Patent Agency Ranking
4.发明授权公开(公告)号：US10056107B2
公开(公告)日：2018-08-21
申请号：US15717035
申请日：2017-09-27
Applicant: Renesas Electronics Corporation
Inventor： Minoru Kurosawa , Kichiya Itagaki , Seigi Ishiji
CPC classification number: G11B19/2063 , G11B5/54 , G11B19/04 , G11B19/2081 , G11B21/02 , G11B21/12
Abstract: A control device is provided which can perform a retraction operation of a head included in a disk storage device with lower power consumption.The control device of the disk storage device includes a control unit that controls a motor and retracts the head from over a disk to a ramp mechanism when power supply is shut down, an acquisition unit that acquires information related to a moving distance of the head that retracts to the ramp mechanism, and a calculation unit that calculates the moving distance of the head based on the information acquired by the acquisition unit. The control unit switches an operation of the motor from a first retract operation to a second retract operation when determining that the head reaches a first position after passing through an inclined surface of the ramp mechanism based on the moving distance calculated by the calculation unit.
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公开(公告)号：US20170126155A1
公开(公告)日：2017-05-04
申请号：US15266936
申请日：2016-09-15
Applicant: Renesas Electronics Corporation
Inventor： Minoru KUROSAWA , Kichiya Itagaki
CPC classification number: H02P6/182 , G11B19/20 , G11B19/2054 , G11B19/2072 , H02P21/22 , H02P27/08
Abstract: The phase of a drive current of a motor is optimized. The phase arithmetic unit PHCAL calculates a drive voltage phase θdrv to converge the phase difference between the reference voltage phase θbemf and the reference current phase θi to zero based on a prescribed arithmetic expression. The phase correction unit PHCP determines the phase θdrvR after the correction by adding a correction value to the phase θdrv, and the magnitude of the correction value is updated by a feedback control so as to converge to a prescribed value the phase difference between the reference voltage phase θbemf and the reference current phase θi which are inputted. A PWM controller shifts an energization control timing synchronized with the reference voltage phase θbemf based on the corrected phase θdrvR, and generates the PWM signal for controlling the drive voltage to a sine wave shape.
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公开(公告)号：US09502060B2
公开(公告)日：2016-11-22
申请号：US14645314
申请日：2015-03-11
Applicant: Renesas Electronics Corporation
Inventor： Hideho Koyama , Minoru Kurosawa , Kichiya Itagaki
CPC classification number: G11B5/54 , G11B5/5534 , G11B5/5573 , G11B21/12 , H02P6/17 , H02P6/182 , H02P25/034
Abstract: The present invention realizes a calibration operation for detecting a motor speed, without employing digital correcting by an external CPU. The calibration operation calculates a comparison reference value corresponding to aback EMF detection signal of a back EMF detector circuit when a zero current flows through a motor and when an arm is fixed. Accordingly, the back EMF detection signal of the back EMF detector circuit is set as the first value and the second value responding to the non-zero current flowing through the motor, and the semiconductor integrated circuit calculates the comparison reference value from the first value and the second value. The difference between the comparison reference value and the comparison input value as the back EMF detection signal of the back EMF detector circuit is reduced by adjusting the gain of an internal amplifier of the back EMF detector circuit by an adjustment unit.
Abstract translation: 本发明实现了用于检测电动机速度的校准操作，而不用外部CPU进行数字校正。 当零电流流过电动机并且当臂固定时，校准操作计算对应于反电动势检测器电路的紧急EMF检测信号的比较参考值。 因此，反电动势检测电路的反电动势检测信号被设定为第一值，第二值响应流过电动机的非零电流，半导体集成电路根据第一值和 第二个值。 作为反电动势检测电路的反电动势检测信号的比较基准值和比较输入值之间的差通过调整单元调整反电动势检测器电路的内部放大器的增益来减小。
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公开(公告)号：US10581364B2
公开(公告)日：2020-03-03
申请号：US16189183
申请日：2018-11-13
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Minoru Kurosawa , Kichiya Itagaki
IPC: H02P6/182 , H02P7/29 , H02P27/08 , G11B19/20 , H02M7/5387
Abstract: An output control unit controls a drive terminal for a BEMF detection object phase to a high-impedance state in a mask term. A BEMF detection unit detects a voltage of the drive terminal for the detection object phase when a center tap voltage is set as a reference as BEMF in a PWM on-term for remaining two phases per PWM period in the mask term and asserts a zero-crossing signal when the voltage is reduced to zero. A PWM fixing unit fixes the remaining two phases to the PWM on-terms in a first term from a predetermined timing after an amplitude level of BEMF becomes smaller than a BEMF threshold amplitude to assertion of the zero-crossing signal. The BEMF detection unit continuously detects BEMF in the first term.
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公开(公告)号：US10199963B2
公开(公告)日：2019-02-05
申请号：US15816702
申请日：2017-11-17
Applicant: RENESAS ELECTRONICS CORPORATION
Inventor： Minoru Kurosawa , Kichiya Itagaki
Abstract: A motor driving device and a motor system that can reduce a torque ripple of a motor are provided. The current control loop detects a drive current of the motor, detects an error between the detected value of the drive current and a current indication value as a target value of the drive current, and determines the duty of the PWM signal reflecting the error concerned. The back EMF phase detector detects the phase of a back electromotive force of each phase in the motor. The torque correction unit calculates a first torque correction coefficient of a periodic function based on the phase variations in the three phases of the back electromotive force, and corrects the current indication value superimposing the first torque correction coefficient on the current indication value.
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