公开(公告)号：US20210343641A1

公开(公告)日：2021-11-04

申请号：US17190916

申请日：2021-03-03

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/495 ,  H01L21/762 ,  H01L21/8234 ,  H01L21/74 ,  H01L49/02 ,  H01L21/56

Abstract: A semiconductor device has a first area in which first and third semiconductor elements are formed, a second area in which second and fourth semiconductor elements are formed, and a third area located between the first and second areas. On the first to fourth semiconductor elements, a multilayer wiring layer including first and second inductors is formed. A through hole penetrating the semiconductor substrate is formed in the third area, and a first element isolation portion protruding from a front surface side of the semiconductor substrate toward a back surface side of the semiconductor substrate is formed in the through hole. Further, on the back surface side of the semiconductor substrate, the semiconductor substrate in the first area is mounted on the first die pad, and the semiconductor substrate in the second area is mounted on the second die pad.

公开(公告)号：US20200168545A1

公开(公告)日：2020-05-28

申请号：US16653127

申请日：2019-10-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi UCHIDA ,  Akio ONO ,  Shinichi KUWABARA ,  Yasutaka NAKASHIBA

IPC: H01L23/522 ,  H01L25/065 ,  H01L23/31 ,  H01L23/00

Abstract: A first semiconductor chip and a second semiconductor chip are stacked such that a first inductor and a second inductor face each other. An insulating sheet is disposed between the first semiconductor chip and the second semiconductor chip. The sealing member seals the first semiconductor chip, the second semiconductor chip, and the insulating sheet. The sealing member is disposed both between the insulating sheet and the first semiconductor chip and between the insulating sheet and the second semiconductor chip.

公开(公告)号：US20190273066A1

公开(公告)日：2019-09-05

申请号：US16278927

申请日：2019-02-19

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA ,  Tetsuya IIDA

IPC: H01L25/065 ,  H02K11/33 ,  H01L23/31 ,  H01L23/495 ,  H01L23/522 ,  H01L21/48 ,  H01L21/56 ,  H01L25/00 ,  H01L49/02

Abstract: A semiconductor device includes a first semiconductor chip having a first inductor element and a second inductor element on a first main surface side, a second semiconductor chip having a third inductor element on a second main surface side, and a third semiconductor chip having a fourth inductor element on a third main surface side. The first and second inductor elements are arranged to be separated from each other in a first direction of the first main surface, the first and second main surfaces face each other, and the first and third inductor elements overlap each other. The first and third main surfaces face each other, the second and fourth inductor elements overlap each other, and a creepage distance between the second and third semiconductor chips is larger than a separation distance between the second and third semiconductor chips.

公开(公告)号：US20200243443A1

公开(公告)日：2020-07-30

申请号：US16743468

申请日：2020-01-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA

IPC: H01L23/522 ,  H01L23/31 ,  H01L23/498 ,  H01L27/22 ,  H01L21/56 ,  H01L21/48 ,  H01L25/065

Abstract: A semiconductor module includes a semiconductor chip including wiring formed over a semiconductor element such as a MISFET, a sealing resin part MR covering the semiconductor chip such that the wiring is exposed, and an inductor formed in redistribution wiring. The inductor overlaps with the sealing resin part covering at least a side surface of the semiconductor chip in plan view.

公开(公告)号：US20200043847A1

公开(公告)日：2020-02-06

申请号：US16505228

申请日：2019-07-08

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA ,  Teruhiro KUWAJIMA

IPC: H01L23/522 ,  H01L23/495 ,  H01L23/00 ,  H01L21/762 ,  H01L21/8238 ,  H01L23/528 ,  H01L21/768

Abstract: A semiconductor device includes a first semiconductor chip on which a first circuit is formed and a second semiconductor chip on which two circuits are formed. In the first semiconductor chip, a first inductor on the transmitting side electrically connected with the first circuit and a second inductor on the receiving side electrically connected with the second circuit via the bonding wire are formed. In plan view, the first inductor and the second inductor are disposed so as not to overlap each other, and are arranged along each other.

公开(公告)号：US20180308795A1

公开(公告)日：2018-10-25

申请号：US15953872

申请日：2018-04-16

Applicant: Renesas Electronics Corporation

Inventor： Shinichi UCHIDA ,  Yasutaka NAKASHIBA ,  Tetsuya IIDA ,  Shinichi KUWABARA

IPC: H01L23/522 ,  H01L23/528 ,  H01L49/02 ,  H01L21/768 ,  H01L21/3213

Abstract: A method of manufacturing a semiconductor device includes a step of: patterning a conductive film formed over an interlayer insulating film so as to form a coil and a conductive pattern in the same layer, and then forming unevennesses on a surface of the interlayer insulating film by etching a portion of the interlayer insulating film with using the coil and the conductive pattern as a mask.

公开(公告)号：US20180299706A1

公开(公告)日：2018-10-18

申请号：US15878619

申请日：2018-01-24

Applicant: Renesas Electronics Corporation

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA ,  Tetsuya IIDA ,  Shinichi WATANUKI

IPC: G02F1/025 ,  H01L29/06 ,  H01L29/16 ,  H01L21/3065 ,  H01L21/311 ,  H01L21/02

CPC classification number: G02F1/025 ,  G02F2001/0151 ,  G02F2201/302 ,  G02F2202/105 ,  H01L21/02532 ,  H01L21/02595 ,  H01L21/0262 ,  H01L21/3065 ,  H01L21/31116 ,  H01L29/0657 ,  H01L29/16

Abstract: To reduce a production cost of a semiconductor device and provide a semiconductor device having improved characteristics. A grating coupler has a plurality of projections separated from each other in an optical waveguide direction and a slab portion formed between any two of the projections adjacent to each other and formed integrally with them; a MOS optical modulator has a projection extending in the optical waveguide direction and slab portions formed on both sides of the projection, respectively, and formed integrally therewith. The projection of the grating coupler and the MOS optical modulator is formed of a first semiconductor layer, a second insulating layer, and a second semiconductor layer stacked successively on a first insulating layer, while the grating coupler and the MOS optical modulator each have a slab portion formed of the first semiconductor layer.

公开(公告)号：US20210366827A1

公开(公告)日：2021-11-25

申请号：US17231623

申请日：2021-04-15

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi UCHIDA ,  Yasutaka NAKASHIBA ,  Shinichi KUWABARA

IPC: H01L23/522 ,  H01L23/00 ,  H01F27/28

Abstract: A semiconductor device includes: a first substrate; a multilayer wiring layer formed on the first substrate; a first inductor formed into a meander shape on the multilayer wiring layer in a plan view; and a second inductor formed into a meander shape on the multilayer wiring layer in a plain view, and arranged so as to be close to the first inductor in a plan view and not to overlap with the first inductor. A transformer is configured by the first inductor and the second inductor and, in a plan view, the first inductor and the second inductor extend along a first direction in which one side of the first substrate extends.

公开(公告)号：US20200161278A1

公开(公告)日：2020-05-21

申请号：US16598806

申请日：2019-10-10

Applicant: RENESAS ELECTRONICS CORPORATION

Inventor： Shinichi KUWABARA ,  Yasutaka NAKASHIBA ,  Tetsuya IIDA

IPC: H01L25/065 ,  H01L25/00 ,  H03K17/687

Abstract: The control system according to embodiments includes a switching element, a control unit controlling the conductive state of the switching element, and a first capacitor storing charge supplied to the control unit. The first capacitor and the control unit are connected with each other via the switching element.

公开(公告)号：US20190004342A1

公开(公告)日：2019-01-03

申请号：US15976912

申请日：2018-05-11

Applicant: Renesas Electronics Corporation

Inventor： Tetsuya IIDA ,  Yasutaka NAKASHIBA ,  Shinichi KUWABARA

IPC: G02F1/01 ,  G02F1/025

Abstract: In an optical waveguide supplied with electricity by using a heater, miniaturization of the device is achieved by enhancing heat dissipation efficiency and heat resistance. In a modulator including an optical waveguide formed on an insulating film, a first interlayer insulating film that covers the optical waveguide, a heater formed on the first interlayer insulating film, and a second interlayer insulating film that covers the heater, a heat conducting portion adjacent to the optical waveguide and the heater and penetrating the first and second interlayer insulating films is formed.