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公开(公告)号：US5425392A
公开(公告)日：1995-06-20
申请号：US67660
申请日：1993-05-26
IPC分类号： H01L21/28 , H01L21/8239
CPC分类号： H01L21/28247 , H01L21/28061
摘要： The present invention teaches a method for reducing sheet resistance in the fabrication of semiconductor wafers. A silicon substrate having a gate oxide layer thereon is provided in a chamber. Subsequently, a polysilicon layer is formed superjacent the gate oxide layer in situ by exposing the silicon substrate to a first gas comprising at least one of silane, disilane, and dichlorosilane, and radiant energy at a temperature substantially within the range of 500.degree. C. to 1250.degree. C. for at least 10 seconds. The polysilicon substrate can be doped with a material such as phosphorus, arsenic and boron for example, by exposing the polysilicon to a second gas under the stated conditions. A conductive layer comprising at least one of tungsten silicide (WSi.sub.x) and titanium silicide (TiSi.sub.x) can be formed superjacent the polysilicon by exposing the polysilicon to a third gas comprising at least one of WF.sub.6, TMAT and TiCl.sub.4.
摘要翻译： 本发明教导了一种在半导体晶片的制造中降低薄层电阻的方法。 在其中设置有其上具有栅极氧化物层的硅衬底。 随后，通过将硅衬底暴露于包括硅烷，乙硅烷和二氯硅烷中的至少一种的第一气体和基本上在500℃的温度范围内的辐射能，在栅极氧化物层的上方形成多晶硅层。 至1250℃至少10秒钟。 多晶硅衬底可以掺杂例如磷，砷和硼的材料，例如通过在所述条件下将多晶硅暴露于第二气体。 通过将多晶硅暴露于包含WF6，TMAT和TiCl4中的至少一种的第三气体，可以在多晶硅之上形成包括硅化钨（WSix）和硅化钛（TiSix）中的至少一种的导电层。
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公开(公告)号：US5851929A
公开(公告)日：1998-12-22
申请号：US582728
申请日：1996-01-04
CPC分类号： H01L21/67288 , H01L21/67115
摘要： A method for correcting the shape of a semiconductor structure. According to the method the shape of a semiconductor structure is initially determined to discern the presence, location and magnitude of structural deformities including warp and bow. Information derived from the topography of the structure is then used to control a heating apparatus. More particularly, individual zones or elements of a multiple zone heating assembly are selectively controlled to direct heat radiation of nonuniform intensities toward different regions of the structure to effect non-isothermal conditions within the structure and thereby reduce deformities that were determined to be present in the structure prior to shape correction.
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3.发明授权
公开(公告)号：US5364187A
公开(公告)日：1994-11-15
申请号：US28040
申请日：1993-03-08
IPC分类号： G01K11/00
CPC分类号： G01K11/00
摘要： A system is disclosed for externally measuring the temperature of a substrate having a reflective surface within a chamber. The system comprises a first light source having sufficient intensity for bombarding the reflective surface with photons, thereby heating the surface. The first light source has an output level and a wavelength substantially in the absorption band of silicon. The system also comprises means for exposing the substrate to a gas in order to form a layer superjacent the reflective surface. A sensor, preferably a photo detector, for sensing changes in the reflectivity of the surface is included. In one embodiment of the present invention, the sensor comprises a second light source and a sensor, for sensing the reflectivity of the surface caused by the reflecting photons. Furthermore, the system comprises control circuitry for controlling the first light source in response to the sensor; the control circuitry being coupled to the sensor by a feedback loop.
摘要翻译： 公开了用于外部测量在室内具有反射表面的基板的温度的系统。 该系统包括具有足够强度的第一光源，用于用光子轰击反射表面，从而加热表面。 第一光源具有基本上在硅的吸收带中的输出电平和波长。 该系统还包括用于将衬底暴露于气体以便形成超过反射表面的层的装置。 包括用于感测表面的反射率变化的传感器，优选光电检测器。 在本发明的一个实施例中，传感器包括第二光源和传感器，用于感测由反射光子引起的表面的反射率。 此外，该系统包括用于响应于传感器控制第一光源的控制电路; 控制电路通过反馈回路耦合到传感器。
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4.再颁专利
公开(公告)号：USRE36050E
公开(公告)日：1999-01-19
申请号：US722360
申请日：1996-09-27
CPC分类号： G01J5/0003 , G01J5/0007 , G01J5/041 , G01K11/14 , G01J2005/0059
摘要： A method is disclosed for continuously measuring the temperature of a semiconductor substrate in a chamber is disclosed. The first step of the method involves providing a substantially clean semiconductor substrate having a layer a reflective surface thereon into a chamber. A film is formed superjacent the surface by introducing a gas comprising at least one of N.sub.2, NH.sub.3, O.sub.2, N.sub.2 O, Ar, Ar--H.sub.2, H.sub.2, GeH.sub.4, or any fluorine based gas and photon energy in situ. The photon energy, having a wavelength substantially in the absorption band of silicon, generates a temperature substantially within the range of 500.degree. C. to 1250.degree. C. Subsequently, the reflectivity of the surface is measured prior to introducing the gas, and continuously, while forming the film until the film is substantially formed. The substrate is exposed to photon energy having a power level responsive to the measured reflectivities of the film.
摘要翻译： 公开了一种连续测量室内半导体衬底的温度的方法。 该方法的第一步包括提供基本上干净的半导体衬底，其具有在其上的反射表面的层到腔室中。 通过引入包含N 2，NH 3，O 2，N 2 O，Ar，Ar-H 2，H 2，GeH 4或任何基于氟的气体中的至少一种的气体和原位的光子能量，在该表面之上形成膜。 具有基本上在硅的吸收带中的波长的光子能量产生基本上在500℃至1250℃范围内的温度。随后，在引入气体之前测量表面的反射率，并且连续地， 同时形成膜直到膜基本形成。 将基板暴露于具有响应于所测量的膜的反射率的功率电平的光子能量。
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5.发明授权Method for chemical vapor depositing a titanium nitride layer on a semiconductor wafer and method of annealing tin films 失效在半导体晶片上化学气相沉积氮化钛层的方法和退火锡膜的方法
公开(公告)号：US5416045A
公开(公告)日：1995-05-16
申请号：US19084
申请日：1993-02-18
IPC分类号： C30B33/00 , H01L21/768 , H01L21/324
CPC分类号： H01L21/76856 , C30B29/38 , C30B33/00 , H01L21/76843 , Y10S438/909
摘要： A method of chemical vapor depositing a titanium nitride layer on a semiconductor wafer within a chemical vapor deposition reactor includes: a) positioning a wafer within a chemical vapor deposition reactor; b) injecting gaseous TiCl.sub.4, NH.sub.3 and N.sub.2 to within the reactor; and c) maintaining the reactor at a selected pressure and a selected temperature which are effective for reacting the TiCl.sub.4 and NH.sub.3 to deposit a uniform film comprising titanium nitride on the wafer, the selected temperature being less than or equal to about 500.degree. C. With a TiN film outwardly exposed, a wafer is annealed by the sequential steps of, a) rapid thermal processing the wafer having the outwardly exposed TiN film to a temperature from about 580.degree. C. to about 700.degree. C.; b) exposing the wafer to NH.sub.3 gas at a temperature from about 580.degree. C. to about 700.degree. C. for at least about 5 seconds to drive chlorine from the TiN film; c) rapid thermal processing the wafer to a temperature of at least about 780.degree. C.; and d) exposing the wafer to N.sub.2 gas at a temperature of at least about 780.degree. C. for at least about 10 seconds.
摘要翻译： 在化学气相沉积反应器内的半导体晶片上化学气相沉积氮化钛层的方法包括：a）将晶片定位在化学气相沉积反应器内; b）将气态TiCl4，NH3和N2注入反应器内; 和c）将反应器保持在选择的压力和选定的温度下，这对于使TiCl 4和NH 3反应在晶片上沉积包含氮化钛的均匀的膜是有效的，所选择的温度小于或等于约500℃。 向外暴露的TiN膜，通过以下顺序的步骤对晶片进行退火：a）将具有向外暴露的TiN膜的晶片快速热处理至约580℃至约700℃的温度; b）在约580℃至约700℃的温度下将晶片暴露于NH 3气体至少约5秒以从TiN膜驱动氯; c）将晶片快速热处理至至少约780℃的温度; 和d）在至少约780℃的温度下将晶片暴露于N 2气体至少约10秒。
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公开(公告)号：US5382551A
公开(公告)日：1995-01-17
申请号：US45398
申请日：1993-04-09
IPC分类号： H01L21/302 , H01L21/306 , H01L21/324 , H01L21/477
CPC分类号： H01L21/306 , Y10S438/928
摘要： A method is disclosed for reducing the effects of semiconductor deformities. Initially, a semiconductor substrate is provided. The substrate has at least one layer superjacent the substrate and at least one layer subjacent the substrate. Subsequently, the semiconductor structure is examined for warp and bow type deformities. As a result of this examination, the warp and bow measurements of the semiconductor structure are compared with a reference. In the event that the measured warp and bow exceed a predetermined tolerance, either the thickness of the layer superjacent or the thickness of the layer subjacent is reduced. This reducing step can be accomplished by chemical and/or mechanical planarization, dry etching, wet etching or plasma etching.
摘要翻译： 公开了一种减少半导体畸变影响的方法。 首先，提供半导体衬底。 衬底具有位于衬底之上的至少一层和位于衬底下面的至少一层。 随后，检查半导体结构的翘曲和弓形畸变。 作为该检查的结果，将半导体结构的翘曲和弯曲测量与参考值进行比较。 在测量的翘曲和弓超过预定公差的情况下，下层的厚度或下层的厚度减小。 该还原步骤可以通过化学和/或机械平面化，干蚀刻，湿蚀刻或等离子体蚀刻来实现。
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公开(公告)号：US5360769A
公开(公告)日：1994-11-01
申请号：US991817
申请日：1992-12-17
IPC分类号： H01L21/28 , H01L21/306 , H01L21/316 , H01L21/02
CPC分类号： H01L21/28211 , H01L21/02046 , H01L21/02131 , H01L21/022 , H01L21/02238 , H01L21/02255 , H01L21/02301 , H01L21/02312 , H01L21/31662
摘要： A method and system for fabricating semiconductor wafers is disclosed wherein an atomically clean, semiconductor substrate having a surface is provided in a rapid thermal processing chamber. One embodiment involves cleaning the substrate by exposing it to a first gas at a temperature substantially within the range of 850.degree. C. to 1250.degree. C. for approximately 10 to 60 seconds. Subsequently, a coating having a first thickness is formed superjacent the substrate surface by introducing a second gas at a temperature substantially within the range of 850.degree. C. to 1250.degree. C. for approximately 5 to 30 seconds in the chamber. The resultant coating, depending on the gas selected, comprises either SiO.sub.2 or Si-F.Subsequently, the substrate having the coating is exposed to a third gas at a temperature substantially within the range of 900.degree. C. to 1050.degree. C. for approximately 30 minutes to one hour, thereby forming a silicon dioxide layer. The silicon dioxide layer is disposed superjacent the substrate and subjacent the coating. In one embodiment of the invention, this step is performed in a furnace. In an alternate embodiment of the present invention, a transferring device, such as a robot, is employed, using a load lock, to transfer the substrate between the RTP chamber and the furnace without exposing the substrate to atmospheric pressure.
摘要翻译： 公开了一种用于制造半导体晶片的方法和系统，其中具有表面的原子干净的半导体衬底设置在快速热处理室中。 一个实施例涉及通过在基本上在850℃至1250℃的温度下将其暴露于第一气体约10至60秒来清洁基底。 随后，通过在室内基本上在850℃至1250℃的温度范围内引入第二气体约5至30秒钟，在衬底表面的上方形成具有第一厚度的涂层。 根据所选择的气体，得到的涂层包含SiO 2或Si-F。 随后，将具有涂层的基板在基本上在900℃至1050℃的温度下暴露于第三气体约30分钟至1小时，从而形成二氧化硅层。 二氧化硅层设置在衬底的上方并且位于涂层的下方。 在本发明的一个实施方案中，该步骤在炉中进行。 在本发明的一个替代实施例中，使用诸如机器人之类的转移装置，使用负载锁来将衬底转移到RTP室和炉之间，而不将衬底暴露于大气压力。
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8.发明授权Controlling semiconductor structural warpage in rapid thermal processing by selective and dynamic control of a heating source 失效通过加热源的选择性和动态控制来控制快速热处理中的半导体结构翘曲
公开(公告)号：US5926742A
公开(公告)日：1999-07-20
申请号：US927603
申请日：1997-09-12
IPC分类号： H01L21/00 , H01L21/324
CPC分类号： H01L21/67288 , H01L21/67115
摘要： A method for correcting the shape of a semiconductor structure. According to the method the shape of a semiconductor structure is initially determined to discern the presence, location and magnitude of structural deformities including warp and bow. Information derived from the topography of the structure is then used to control a heating apparatus. More particularly, individual zones or elements of a multiple zone heating assembly are selectively controlled to direct heat radiation of nonuniform intensities toward different regions of the structure to effect non-isothermal conditions within the structure and thereby reduce deformities that were determined to be present in the structure prior to shape correction.
摘要翻译： 一种用于校正半导体结构的形状的方法。 根据该方法，首先确定半导体结构的形状以辨别包括翘曲和弓形的结构畸形的存在，位置和大小。 然后使用从结构的形貌得到的信息来控制加热装置。 更具体地，选择性地控制多区加热组件的单个区域或元件以将不均匀强度的热辐射引导到结构的不同区域，以实现结构内的非等温条件，从而减少被确定为存在于 形状校正前的结构。
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9.发明授权
公开(公告)号：US5350236A
公开(公告)日：1994-09-27
申请号：US28051
申请日：1993-03-08
CPC分类号： G01J5/0003 , G01J5/0007 , G01J5/041 , G01K11/14 , G01J2005/0059
摘要： A method is disclosed for continuously measuring the temperature of a semiconductor substrate in a chamber is disclosed. The first step of the method involves providing a substantially clean semiconductor substrate having a layer a reflective surface thereon into a chamber. A film is formed superjacent the surface by introducing a gas comprising at least one of N.sub.2, NH.sub.3, O.sub.2, N.sub.2 O, Ar, Ar--H.sub.2, H.sub.2, GeH.sub.4, or any fluorine based gas and photon energy in situ. The photon energy, having a wavelength substantially in the absorption band of silicon, generates a temperature substantially within the range of 500.degree. C. to 1250.degree. C. Subsequently, the reflectivity of the surface is measured prior to introducing the gas, and continuously, while forming the film until the film is substantially formed. The substrate is exposed to photon energy having a power level responsive to the measured reflectivities of the film.
摘要翻译： 公开了一种连续测量室内半导体衬底的温度的方法。 该方法的第一步包括提供基本上干净的半导体衬底，其具有在其上的反射表面的层到腔室中。 通过引入包含N 2，NH 3，O 2，N 2 O，Ar，Ar-H 2，H 2，GeH 4或任何基于氟的气体中的至少一种的气体和原位的光子能量，在该表面之上形成膜。 具有基本上在硅的吸收带中的波长的光子能量产生基本上在500℃至1250℃范围内的温度。随后，在引入气体之前测量表面的反射率，并且连续地， 同时形成膜直到膜基本形成。 将基板暴露于具有响应于所测量的膜的反射率的功率电平的光子能量。
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10.发明授权Method for enhancing nitridation and oxidation growth by introducing pulsed NF.sub.3 失效通过引入脉冲NF3来增强氮化和氧化生长的方法
公开(公告)号：US5264396A
公开(公告)日：1993-11-23
申请号：US4326
申请日：1993-01-14
IPC分类号： H01L21/306 , H01L21/314 , H01L21/316 , H01L21/318 , H01L21/02
CPC分类号： H01L21/02046 , H01L21/0217 , H01L21/02238 , H01L21/02247 , H01L21/02255 , H01L21/3144 , H01L21/31662 , H01L21/3185 , Y10S148/112 , Y10S438/906
摘要： A method and system for fabricating semiconductor wafers is disclosed, wherein a rugged and/or smooth, atomically clean, semiconductor substrate is provided in a rapid thermal processing ("RTP") chamber. The substrate can be single crystal, polycrystalline or amorphous silicon. In one embodiment of the present invention, the substrate is cleaned by exposing it to at least one of CF.sub.4, C.sub.2 F.sub.2, C.sub.2 F.sub.6, C.sub.4 F.sub.8, CHF.sub.3, HF, NF.sub.6, and NF.sub.3 diluted with Ar-H.sub.2 at a temperature substantially within the range of 650.degree. C. to 1150.degree. C. for approximately 10 to 60 seconds in the chamber. Subsequently, the clean substrate is exposed to a first gas and energy generating a first temperature substantially within the range of 650.degree. C. to 1150.degree. C. in situ under substantially high vacuum for approximately 5 seconds to 20 seconds. Simultaneous to exposing the substrate to the first gas, a second gas comprising fluorine as an oxidizing agent, preferably NF.sub.3, is advanced by pulsing its introduction in situ under substantially high vacuum. By pulsing the introduction of the second gas, an on phase substantially in the range of 2 seconds to 5 seconds and an off phase substantially in the range of 5 seconds to 6 seconds is established. Preferably, the pulsing comprises two on and two off phases. In one embodiment of the present inventive method, the first gas comprises at least one of O.sub.2 and N.sub.2 O in combination with Ar to thereby fabricate a silicon dioxide layer superjacent the substrate.
摘要翻译： 公开了一种用于制造半导体晶片的方法和系统，其中在快速热处理（“RTP”）室中提供粗糙和/或平滑的原子清洁的半导体衬底。 衬底可以是单晶，多晶或非晶硅。 在本发明的一个实施方案中，通过将基板暴露于基本上在650℃范围内的温度下用Ar-H 2稀释的CF 4，C 2 F 2，C 2 F 6，C 4 F 8，CHF 3，HF，NF 6和NF 3中的至少一种 ℃至1150℃，室中约10至60秒。 随后，将清洁的基板暴露于第一气体和在基本上高真空下基本上在650℃至1150℃的范围内产生第一温度约5秒至20秒的能量。 同时将基底暴露于第一气体，包含氟作为氧化剂，优选NF 3的第二气体通过在基本上高的真空下原位脉冲引入。 通过脉冲引入第二气体，建立基本上在2秒至5秒范围内的接通相位和基本上在5秒至6秒范围内的截止相位。 优选地，脉冲包括两个开和相两相。 在本发明方法的一个实施方案中，第一气体包括与Ar组合的O 2和N 2 O中的至少一种，从而在衬底之上制造二氧化硅层。
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