公开(公告)号：US5683932A

公开(公告)日：1997-11-04

申请号：US516625

申请日：1995-08-18

Applicant: Rashid Bashir ,  Francois Hebert ,  Datong Chen

Inventor： Rashid Bashir ,  Francois Hebert ,  Datong Chen

IPC: H01L21/762 ,  H01L21/76

CPC classification number: H01L21/76229 ,  H01L21/76232 ,  Y10S438/97

Abstract: An isolation method for separating active regions in a semiconductor substrate by combining field oxide formation with trench isolation is disclosed. Deep trenches are etched in a silicon substrate. An oxide layer is deposited over the entire substrate such that the oxide layer also fills the trenches that have been etched. A layer of polysilicon is deposited over the wafer and etched back to form polysilicon spacers. These polysilicon spacers are used to align a photoresist mask that is used to etch the oxide overlying the active regions of the substrate, thereby resulting in fully planarized isolation regions with fully walled active regions.

Abstract translation: 公开了通过将场氧化物形成与沟槽隔离组合来分离半导体衬底中的有源区的隔离方法。 在硅衬底中蚀刻深沟槽。 在整个基板上沉积氧化物层，使得氧化物层也填充已被蚀刻的沟槽。 一层多晶硅沉积在晶片上并被回蚀以形成多晶硅间隔物。 这些多晶硅间隔物用于对齐用于蚀刻覆盖衬底的有源区域的氧化物的光致抗蚀剂掩模，由此导致完全平坦化的具有完全有壁的活性区域的隔离区域。

公开(公告)号：US5411913A

公开(公告)日：1995-05-02

申请号：US236387

申请日：1994-04-29

Applicant: Rashid Bashir ,  Francois Hebert ,  Datong Chen

Inventor： Rashid Bashir ,  Francois Hebert ,  Datong Chen

IPC: H01L21/3105 ,  H01L21/763 ,  H01L21/311 ,  H01L21/76

CPC classification number: H01L21/31056 ,  H01L21/763

Abstract: A device isolation scheme that is particularly suited to the fabrication of high density, high performance CMOS, bipolar, or BiCMOS devices, and overcomes many of the problems associated with existing isolation methods. Photolithographic techniques are used to define active regions on a substrate. Using the photoresist as a mask for the active regions, the silicon in the inactive regions is etched. A pad oxide layer and nitride layer are then formed on the substrate. A layer of oxide is then deposited and photolithographic techniques are again used to define the locations for desired trench structures. After removal of the remaining photoresist, deep trenches are etched in the silicon substrate. An oxidation step is then carried out to provide a layer of oxide lining the trenches, followed by deposition of a layer of poly-silicon over the substrate, filling the trenches. The poly-silicon layer is etched back, removing it from the tops of the trenches and the field regions, and leaving a poly-silicon spacer on the sides of those portions of the previously deposited oxide layer which cover the active regions. The spacers are used to align a photoresist mask which is used to etch away the oxide layer on top of the active regions. The spacers are then removed while keeping the photoresist mask intact, thereby protecting the poly-silicon on top of the trenches. The photoresist mask is then removed and the poly-silicon on top of each trench is oxidized to cap the trench. The result is a highly planar surface in which active regions are separated by field oxide or poly-silicon filled trenches.

Abstract translation: 特别适用于制造高密度，高性能CMOS，双极或BiCMOS器件的器件隔离方案，并克服了与现有隔离方法相关的许多问题。 光刻技术用于定义衬底上的有源区。 使用光致抗蚀剂作为有源区的掩模，蚀刻非活性区中的硅。 然后在衬底上形成焊盘氧化物层和氮化物层。 然后沉积一层氧化物，再次使用光刻技术来定义所需沟槽结构的位置。 在除去剩余的光致抗蚀剂之后，在硅衬底中蚀刻深沟槽。 然后进行氧化步骤以提供在沟槽内衬的氧化层，随后在衬底上沉积多晶硅层，填充沟槽。 将多晶硅层回蚀刻，将其从沟槽和场区域的顶部除去，并且在覆盖活性区域的先前沉积的氧化物层的那些部分的侧面留下多晶硅间隔物。 间隔物用于对准用于蚀刻掉活性区域顶部上的氧化物层的光致抗蚀剂掩模。 然后除去间隔物，同时保持光致抗蚀剂掩模完好无损，从而保护沟槽顶部的多晶硅。 然后去除光致抗蚀剂掩模，并且每个沟槽顶部上的多晶硅被氧化以覆盖沟槽。 结果是高度平坦的表面，其中有源区域被场氧化物或多晶硅填充的沟槽分离。

公开(公告)号：US5691232A

公开(公告)日：1997-11-25

申请号：US563862

申请日：1995-11-29

Applicant: Rashid Bashir ,  Francois Hebert ,  Datong Chen

Inventor： Rashid Bashir ,  Francois Hebert ,  Datong Chen

IPC: H01L21/762 ,  H01L21/76

CPC classification number: H01L21/76229 ,  H01L21/76232 ,  Y10S438/97

Abstract: An isolation method for separating active regions in a semiconductor substrate by combining field oxide formation with trench isolation is disclosed. Deep trenches are etched in a silicon substrate. An oxide layer is deposited over the entire substrate such that the oxide layer also fills the trenches that have been etched. Next, a layer of polysilicon is deposited over the wafer and etched back to form polysilicon spacers. These polysilicon spacers are used to align a photoresist mask that is used to etch the oxide overlying the active regions of the substrate, thereby resulting in fully planarized isolation regions with fully walled active regions.

Abstract translation: 公开了通过将场氧化物形成与沟槽隔离组合来分离半导体衬底中的有源区的隔离方法。 在硅衬底中蚀刻深沟槽。 在整个基板上沉积氧化物层，使得氧化物层也填充已被蚀刻的沟槽。 接下来，将多晶硅层沉积在晶片上并被回蚀以形成多晶硅间隔物。 这些多晶硅间隔物用于对齐用于蚀刻覆盖衬底的有源区域的氧化物的光致抗蚀剂掩模，由此导致完全平坦化的具有完全有壁的活性区域的隔离区域。

公开(公告)号：US5385861A

公开(公告)日：1995-01-31

申请号：US213144

申请日：1994-03-15

Applicant: Rashid Bashir ,  Francois Hebert ,  Datong Chen

Inventor： Rashid Bashir ,  Francois Hebert ,  Datong Chen

IPC: H01L21/762 ,  H01L21/763 ,  H01L21/76

CPC classification number: H01L21/76227 ,  H01L21/763 ,  Y10S148/05

Abstract: A novel device isolation scheme for separating active regions on a semiconductor substrate by combining field oxide formation with trench isolation is disclosed. According to this scheme, shallow and deep trenches are etched into the semiconductor substrate. A layer of nitride is deposited over the entire substrate followed by a layer of poly-silicon. Oxide spacers on the poly-silicon and a photoresist mask is aligned within the oxide spacers, thereby permitting the selective etching of the poly-silicon layer. The poly-silicon layer overlying the active regions of the semiconductor substrate are etched away. Then an oxidation step is performed such that the poly-silicon layer filling the shallow trenches is oxidized while the poly-silicon filling the deep trenches remains unoxidized. The alignment of the photoresist becomes highly non-critical because of the use of the oxide spacers and fully walled junctions are provided.

Abstract translation: 公开了一种用于通过组合场氧化物形成和沟槽隔离来分离半导体衬底上的有源区的新型器件隔离方案。 根据该方案，将浅沟槽和深沟槽蚀刻到半导体衬底中。 一层氮化物沉积在整个衬底上，随后是一层多晶硅。 在多晶硅和光致抗蚀剂掩模之间的氧化物间隔物在氧化物间隔物内对准，从而允许多晶硅层的选择性蚀刻。 覆盖半导体衬底的有源区的多晶硅层被蚀刻掉。 然后执行氧化步骤，使得填充浅沟槽的多晶硅层被氧化，而填充深沟槽的多晶硅保持未氧化。 由于使用氧化物间隔物并且提供了完全的壁结，因此光致抗蚀剂的取向变得非常关键。

公开(公告)号：US5827762A

公开(公告)日：1998-10-27

申请号：US850603

申请日：1997-05-02

Applicant: Rashid Bashir ,  Francois Hebert ,  Datong Chen

Inventor： Rashid Bashir ,  Francois Hebert ,  Datong Chen

IPC: H01L21/768 ,  H01L21/8238

CPC classification number: H01L21/76886

Abstract: A buried interconnect structure which is stable at the high temperatures involved in BiCMOS, bipolar, and CMOS transistor process flows, and a method of making the same. The interconnect structure is fully insulated and can be used to form stable, doped structures suitable for use as electrodes and gate structures in a CMOS process, or to form low resistance contacts to N or P-type silicon as part of a bipolar process. Because the interconnect structure is buried and fully insulated from surrounding structures, it may be used to form complex, multi-level devices having a minimized geometry and increased circuit density.

Abstract translation: 在BiCMOS，双极和CMOS晶体管工艺流程中涉及的高温下稳定的埋入式互连结构及其制造方法。 互连结构是完全绝缘的，并且可以用于形成适合用作CMOS工艺中的电极和栅极结构的稳定的掺杂结构，或者作为双极工艺的一部分形成作为N型或P型硅的低电阻接触。 因为互连结构被掩埋并且与周围结构完全绝缘，所以它可用于形成具有最小几何形状和增加的电路密度的复杂的多电平器件。

公开(公告)号：US5681776A

公开(公告)日：1997-10-28

申请号：US708359

申请日：1996-09-04

Applicant: Francois Hebert ,  Datong Chen ,  Rashid Bashir

Inventor： Francois Hebert ,  Datong Chen ,  Rashid Bashir

IPC: H01L21/762 ,  H01L21/76

CPC classification number: H01L21/76227

Abstract: An isolation method for separating active regions on a semiconductor substrate is disclosed. Portions of the substrate not corresponding to the active regions are etched to a predetermined depth. After some oxide, nitride and dielectric deposition steps, a photoresist is patterned on the dielectric material such that the photoresist completely covers the active regions of the substrate and overlaps into the portions of the substrate that are eventually to represent field oxide regions. Any portion of the dielectric, nitride oxide layers that are not covered by the photoresist are removed and a combined step of selective epitaxial growth (SEG) and epitaxial lateral overgrowth (ELO) is performed. The exposed silicon is then oxidizing and the dielectric, nitride and oxide layers are removed from the active regions of the substrate. The semiconductor device is then ready for subsequent processing.

Abstract translation: 公开了一种用于分离半导体衬底上的有源区的隔离方法。 将不对应于活性区域的基板的部分蚀刻到预定深度。 在一些氧化物，氮化物和电介质沉积步骤之后，光致抗蚀剂被图案化在电介质材料上，使得光致抗蚀剂完全覆盖衬底的有源区并且重叠到最终表示场氧化物区域的衬底部分中。 去除未被光致抗蚀剂覆盖的电介质氮氧化物层的任何部分，并执行选择性外延生长（SEG）和外延横向过度生长（ELO）的组合步骤。 然后将暴露的硅氧化，并从衬底的有源区域去除电介质，氮化物和氧化物层。 然后半导体器件准备好用于后续处理。

公开(公告)号：US5439833A

公开(公告)日：1995-08-08

申请号：US213630

申请日：1994-03-15

Applicant: Francois Hebert ,  Datong Chen ,  Rashid Bashir

Inventor： Francois Hebert ,  Datong Chen ,  Rashid Bashir

IPC: H01L21/8249 ,  H01L27/06 ,  H01L21/265

CPC classification number: H01L27/0623 ,  H01L21/8249 ,  Y10S148/009

Abstract: A truly complementary bipolar transistor structure and a combined bipolar and CMOS transistor structure are disclosed, each including a silicide layer formed upon a substrate that acts as an extrinsic base and gate. Optionally, a layer of polysilicon can be formed between the silicide layer and the substrate. An oxide layer (LTO) is formed or deposited over the silicide layer by chemical vapor deposition (CVD). Selected regions are defined and etched using a photoresist layer. Subsequent steps of implanting, etching and metalization are performed to produce transistors with reduced gate and extrinsic base resistances. Polysilicon may be used, instead of metal, as a contact in one embodiment of the invention.

Abstract translation: 公开了一种真正互补的双极晶体管结构和组合的双极和CMOS晶体管结构，每个晶体管结构包括形成在用作外部基极和栅极的衬底上的硅化物层。 可选地，可以在硅化物层和衬底之间形成多晶硅层。 通过化学气相沉积（CVD）在硅化物层上形成或沉积氧化物层（LTO）。 使用光致抗蚀剂层限定和蚀刻所选择的区域。 进行植入，蚀刻和金属化的后续步骤以产生具有减小的栅极和非本征基极电阻的晶体管。 在本发明的一个实施方案中，可以使用多晶硅代替金属作为接触。

公开(公告)号：US08072960B2

公开(公告)日：2011-12-06

申请号：US12022984

申请日：2008-01-30

Applicant: Yanshan Shi ,  Ling Lv ,  Jingdong Lin ,  Datong Chen

Inventor： Yanshan Shi ,  Ling Lv ,  Jingdong Lin ,  Datong Chen

IPC: H04J3/00

CPC classification number: H04W72/005 ,  H04W48/10

Abstract: A networking method of single frequency network in a TD-SCDMA system includes the steps of: (1) deciding a networking configuration scheme by a universal mobile telecommunications system terrestrial radio access network (UTRAN), (2) based on the decided networking configuration scheme, configuring an intra-frequency cell info list information element and an inter-frequency cell info list information element in system information and measurement control messages by the UTRAN, (3) transmitting signals over a servicing area by the UTRAN, and (4) receiving the system information and measurement control messages by a user equipment (UE) from the UTRAN, acquiring working mode configuration information of each frequency and each timeslot of a serving cell and neighboring cells, and judging whether there are duplicated cell information elements in the intra-frequency cell info list information element or the inter-frequency cell info list information element.

Abstract translation: TD-SCDMA系统中单频网络的组网方法包括以下步骤：（1）通过通用移动电信系统陆地无线接入网（UTRAN）决定网络配置方案，（2）基于所确定的网络配置方案 ，在UTRAN的系统信息和测量控制消息中配置频率小区信息列表信息单元和频率间小区信息列表信息单元，（3）由UTRAN通过服务区域发送信号，以及（4）接收 来自UTRAN的用户设备（UE）的系统信息和测量控制消息，获取服务小区和相邻小区的每个频率和每个时隙的工作模式配置信息，并且判断是否存在复制小区信息元素， 频率单元信息列表信息单元或频率间单元信息列表信息单元。

公开(公告)号：US20080087274A1

公开(公告)日：2008-04-17

申请号：US11757004

申请日：2007-06-01

Applicant: Datong Chen

Inventor： Datong Chen

IPC: F24J2/38

CPC classification number: F24S50/20 ,  F24S23/30 ,  F24S23/70 ,  Y02B10/20 ,  Y02E10/47

Abstract: A solar energy collecting device includes a rotation axis to be mounted parallel to the earth's polar axis, a solar energy collector mounted for rotation around the rotation axis at a predetermined rotation speed, the solar energy collector defining a tilt angle with respect to the rotation axis, and a tilt angle adjustment mechanism for automatically and intermittently adjusting the tilt angle. Various configurations of the solar energy collector are possible, and the rotation speed may be one revolution per day or half a revolution per day depending on the solar energy collector configuration. Many drive modes are possible, including rotating continuously throughout a day or rotating during daylight hours and rotating backward or forward at night. The tilt angle adjustment mechanism includes a handle fixed to the solar energy collector and a tilt angle change guide.

Abstract translation: 太阳能收集装置包括平行于地球极轴的旋转轴线，安装成以预定转速围绕旋转轴旋转的太阳能收集器，太阳能收集器限定相对于旋转轴线的倾斜角度 以及用于自动和间歇地调整倾斜角的倾斜角度调节机构。 太阳能收集器的各种构造是可能的，并且根据太阳能收集器配置，旋转速度可以是每天一转还是每天一转一半。 许多驱动模式是可能的，包括一天中连续旋转或在白天小时旋转，并在夜间向后或向前旋转。 倾斜角度调节机构包括固定于太阳能收集器的手柄和倾斜角度变化导向器。

公开(公告)号：US06798939B2

公开(公告)日：2004-09-28

申请号：US10099116

申请日：2002-03-14

Applicant: Frederick Austin Stawitcke ,  Shalini Venkatesh ,  Datong Chen ,  Richard Earl Haven ,  Mark Andrew Troll ,  David James Anvar

Inventor： Frederick Austin Stawitcke ,  Shalini Venkatesh ,  Datong Chen ,  Richard Earl Haven ,  Mark Andrew Troll ,  David James Anvar

IPC: G02B642

CPC classification number: G02B6/3538 ,  G02B6/3576

Abstract: Bubble stability within an optical switch is enhanced by controlling the expansion or movement of a bubble from a liquid-containing trench into available adjacent spacing. Typically, the adjacent spacing is formed between an optical waveguide substrate and a heater substrate, where the heater substrate includes a microheater for forming the bubble. The bubble enhancement is provided by intentionally altering surface features along at least one of the substrates.

Abstract translation: 通过控制气泡从含液体沟槽到可用的相邻间隔的膨胀或移动来增强光学开关内的气泡稳定性。 通常，相邻的间隔形成在光波导基板和加热器基板之间，其中加热器基板包括用于形成气泡的微加热器。 通过有意地改变至少一个基底的表面特征来提供气泡增强。