摘要:
A method and apparatus for improving signal reception in a receiver (100) by performing all-channel and/or on-channel estimations on a received signal so as to predict future RF environments. The prediction is achieved through the use of one or more detector systems (122, 124) positioned to sample and detect predetermined signal metrics of the received signal (103) prior to analog-to-digital conversion (112) and subsequent post-processing (114). Future estimations of the channel condition are thus generated prior to the arrival of the actual samples (115) at a controller section (116). The detectors (122, 124) provide triggers (123, 125) to the controller (116) so that active stages (130) within the receiver (100) can be adjusted and scaled as needed via a serial port interface (SPI) (126) based on signal conditions.
摘要:
A method for minimizing undesired signal coupling from digital interface between peripherals is presented. The method includes transmitting over the interface first and second signals having a parameter ζk set by a dynamic sequencer respectively to a first and second value α1 and α2, receiving the first and second signal and generating a first and second interference metric respectively for the first and second signal. The first and second interference metrics are correlated to generate a final parameter value αf, and a transmitter is then configured to transmit a third signal over the interface with the final parameter value αf.
摘要:
A signal generation power management control system (100) for use in a portable communications device includes a digital signal processor (DSP) (101) for processing a digital source input and providing a digital processed bit stream A digital-to-analog converter (DAC) (103) is used for converting the digital processed bit stream to provide an analog signal. A power management controller (115) within the DSP (101) is then used for interpreting control parameters of signal processing components used within the portable communications device and dynamically adjusting the bias current of these components based on minimal signal requirements of the analog signal.
摘要:
A method and an apparatus (300) for generating corrected quadrature phase signal pairs in a communication device are provided. The apparatus (300) includes a quadrature phase generator (310), programmable delay elements (320, 330) and a control circuit (360). The programmable delay elements (320, 330) receive a quadrature phase signal pair (signals I 312 and Q 314) from the quadrature phase generator (310). The control circuit (360) generates a control signal (362) based on outputs (325, 335) of the programmable delay elements (320, 330). The control signal (362) configures the programmable delay elements (320, 330). The programmable delay elements (320, 330) are configured to adjust delay between the signals I (312) and Q (314). The programmable delay elements (320, 330) are also used to adjust duty cycle for the quadrature phase signal pair to provide the corrected quadrature phase signal pair.
摘要:
A transceiver synthesizer includes components that enable it to be tuned non-invasively by software. The transceiver synthesizer includes a non-volatile memory (30) that can be non-invasively programmed with a digital value for each of a number of tuning variables. The digital values are converted by digital to analog converters (37, 38, 39) into tuning voltages. The tuning voltages are applied to voltage variable devices (60, 80, 95) that respond to changes in the applied tuning voltage to vary an operating characteristic thereof. The operating characteristics of the voltage variable devices (60, 80, 95) are non-invasively adjustable to tune the transceiver synthesizer for high and low port modulation deviation, reference oscillator make tolerance, automatic frequency control, reference oscillator temperature compensation etc.
摘要:
A transceiver (10) includes a dual port phase and magnitude balanced synthesizer modulator (60). The modulator (60) couples a modulation input to a voltage controlled oscillator (40) and to a reference oscillator (42) that are coupled together in a phase locked loop (44). The modulator 60 includes a magnitude balancing circuit (64) that divides a modulation input representing data or the like into a first modulation input signal applied to the reference oscillator (42) and a second modulation input signal for the voltage controlled oscillator (40). A phase balancing circuit (68) induces a negative phase shift in the second modulation input signal that is coupled to the voltage controlled oscillator (40) in order to compensate for the phase lag of the reference oscillator loop (44).
摘要:
A method for tuning a filter is provided. The amplitude of a first signal (I1) is compared with the amplitude of a comparison signal. The first signal is generated with a first filter, which receives a first input signal, and there is a phase difference between the first signal (I1) and the comparison signal. A tuning signal is then generated based on differences between the amplitudes of the first signal (I1) and the comparison signal. The tuning signal compensates for any phase and/or amplitude offset in the first signal (I1).
摘要:
A frequency synthesizer that utilizes locked loop circuitry, for example delay locked loop and/or phase locked loop circuits is provided with a means for minimizing static phase/delay errors. An auto-tuning circuit and technique provide a measurement of static phase error by integrating the static phase error in the DLL/PLL circuit. A correction value is determined and applied as a current at the charge pump or as a time/phase offset at the phase detector to minimize static phase error. During normal operation the DLL/PLL is operated with the correction value resulting in substantially reduced spur levels and/or improved settling time.
摘要:
A signal generation power management control system (100) for use in a portable communications device includes a digital signal processor (DSP) (101) for processing a digital source input and providing a digital processed bit stream A digital-to-analog converter (DAC) (103) is used for converting the digital processed bit stream to provide an analog signal. A power management controller (115) within the DSP (101) is then used for interpreting control parameters of signal processing components used within the portable communications device and dynamically adjusting the bias current of these components based on minimal signal requirements of the analog signal.
摘要:
A DC offset correction method and apparatus. Several DC offset correction schemes including a digital binary search scheme (100), a digital slow averaging scheme (200) and an analog integration (50) scheme are provided. A controller (160) selects one or more of the correction schemes in accordance with the desired characteristics provided by each scheme.