Package substrate and chip package structure using the same

    公开(公告)号:US12046543B2

    公开(公告)日:2024-07-23

    申请号:US17679862

    申请日:2022-02-24

    Abstract: A package substrate and a chip package structure using the same are provided. The package substrate includes a laminated board including first to third wiring layers, a pad array, a plurality of ground conductive structures, and a plurality of power conductive structures. At least one of the ground (or power) conductive structures includes two first ground (or power) conductive posts and a second ground (or power) conductive post. The two first ground (or power) conductive posts and the second ground (or power) conductive post are arranged along a first direction, and the second ground (or power) conductive post is located between two orthographic projections of the two first ground (or power) conductive posts. Each of the ground conductive structures in a first column and each of the power conductive structures in a second column are offset from each other in a second direction.

    Power performance management method and electronic device

    公开(公告)号:US11231759B2

    公开(公告)日:2022-01-25

    申请号:US16904050

    申请日:2020-06-17

    Abstract: A performance management method and an electronic device are provided. The method is applied to the electronic device with a system processor and includes: sensing a temperature of the electronic device and determining whether the temperature is greater than a first temperature setting value; when the temperature is not greater than the first temperature setting value, initiating a frequency increasing procedure; when the temperature is greater than the first temperature setting value, determining whether the temperature is greater than a second temperature setting value, where the second temperature setting value is greater than the first temperature setting value; when the temperature is greater than the first temperature setting value and is not greater than the second temperature setting value, initiating a first frequency reducing procedure; and when the temperature is greater than the second temperature setting value, initiating a second frequency reducing procedure or turning off the system processor.

    Processor with adjustable operating frequency

    公开(公告)号:US11646738B2

    公开(公告)日:2023-05-09

    申请号:US17695821

    申请日:2022-03-15

    CPC classification number: H03K19/01855 H03K19/0016 H03K19/17784

    Abstract: The present invention provides a processor including a core circuit, a plurality of clock signal generation circuits, a multiplexer and a detection circuit is disclosed. The core circuit is supplied by a supply voltage. The plurality of clock signal generation circuits are configured to generate a plurality of clock signals with different frequencies, respectively, wherein a number of the plurality of clock signals is equal to or greater than three. The multiplexer is configured to receive the plurality of clock signals, and to select one of the plurality of clock signals to serve as an output clock signal according to a control signal, wherein the core circuit uses the output clock signal to serve as an operating clock. The detection circuit is configured to detect a level of the supply voltage received by the core circuit in a real-time manner, to generate the control signal.

    Control device and circuit board
    4.
    发明授权

    公开(公告)号:US11227851B2

    公开(公告)日:2022-01-18

    申请号:US16718256

    申请日:2019-12-18

    Abstract: A control device and a circuit board are provided. The control device can cooperate with the circuit board, and includes a ball grid array. The ball grid array includes a plurality of power balls and a plurality of ground balls, which are jointly arranged in a ball region. The power balls and the ground balls are respectively divided into a plurality of power ball groups and a plurality of ground ball groups. One of the ground ball groups includes two ground balls and is adjacent to a power ball group. A ball pitch between the two ground balls is greater than that between one of the power balls and one of the ground balls adjacent to each other. The circuit board includes a contact pad array corresponding to the ball grid array of the control device so that the control device can be disposed on the circuit board.

    PERFORMANCE MANAGEMENT METHOD AND ELECTRONIC DEVICE

    公开(公告)号:US20210181822A1

    公开(公告)日:2021-06-17

    申请号:US16904050

    申请日:2020-06-17

    Abstract: A performance management method and an electronic device are provided. The method is applied to the electronic device with a system processor and includes: sensing a temperature of the electronic device and determining whether the temperature is greater than a first temperature setting value; when the temperature is not greater than the first temperature setting value, initiating a frequency increasing procedure; when the temperature is greater than the first temperature setting value, determining whether the temperature is greater than a second temperature setting value, where the second temperature setting value is greater than the first temperature setting value; when the temperature is greater than the first temperature setting value and is not greater than the second temperature setting value, initiating a first frequency reducing procedure; and when the temperature is greater than the second temperature setting value, initiating a second frequency reducing procedure or turning off the system processor.

    Electronic apparatus and circuit board thereof

    公开(公告)号:US10763197B2

    公开(公告)日:2020-09-01

    申请号:US16371378

    申请日:2019-04-01

    Abstract: An electronic apparatus and a circuit board thereof are provided. The electronic apparatus includes a control device that can operate with the circuit board, and includes a ball pad array. The ball pad array includes a plurality of power ball pads and a plurality of ground ball pads, which are arranged in the same pad arrangement region. At least a portion of the power ball pads and at least a portion of the ground ball pads are arranged in an alternate manner. The circuit board includes a solder pad array corresponding to the ball pad array of the control device so as to be disposed with the control device.

    CONSUMER ELECTRONICS CONTROL SYSTEM AND ELECTRONIC SYSTEM CONTROL METHOD

    公开(公告)号:US20250045222A1

    公开(公告)日:2025-02-06

    申请号:US18791371

    申请日:2024-07-31

    Inventor: Chao-Min Lai

    Abstract: A CEC system, comprising: a first IC, comprising a first pin and an anti-leakage circuit electrically coupled to the first pin; and a second IC, comprising a second pin electrically coupled to the first pin. The first IC or the second IC is configured to provide a CEC function. Thereby software can be used to simulate CEC functions to increase the number of CEC function sets without increasing hardware costs, to increase the application scope of the CEC system.

    Method and audio receiver capable of effectively reducing or avoiding current noise

    公开(公告)号:US11381912B2

    公开(公告)日:2022-07-05

    申请号:US17210439

    申请日:2021-03-23

    Abstract: An audio receiver includes a first signal port, a second signal port, a power supply port, a power ground port, and an amplifier circuit. The first signal port is coupled to an audio signal line of a transmission interface. The second signal port is coupled to an audio ground line of the transmission interface. The power supply port is coupled to a power supply line of the transmission interface to generate a power supply level to the power supply line. The power ground port is connected to the ground level and to a power ground line of the transmission interface. When the audio receiver is outputting a power supply current to the audio source device through the power supply port via the power supply line, a connection state between the second signal port and the power ground port is at a high impedance state.

    Universal serial bus converter circuit and related method

    公开(公告)号:US10152447B2

    公开(公告)日:2018-12-11

    申请号:US15209764

    申请日:2016-07-14

    Inventor: Chao-Min Lai

    Abstract: A Universal Serial Bus (USB) converter circuit includes: a High Definition Multimedia Interface (HDMI) transceiver circuit, a signal converting circuit and a USB receptacle, wherein the HDMI transceiver circuit arranged to transmit/receive a HDMI signal, wherein the HDMI transceiver circuit includes at least a video signal and a plurality of processing signals; the signal converting circuit coupled to the HDMI transceiver circuit is arranged to execute a converting operation to processing a conversion between the plurality of processing signals and A USB signal; and the USB receptacle coupled to the signal converting circuit includes a USB signal pin and a set of video signal pin, wherein the USB signal is transmitted/received with an electronic device through the USB pin, and the video signal is transmitted/received with the electronic device through the set of video signal pin.

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