Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer
    1.
    发明授权
    Method and apparatus for compensating for critical dimension variations in the production of a semiconductor wafer 失效
    用于补偿半导体晶片生产中的临界尺寸变化的方法和装置

    公开(公告)号:US06255125B1

    公开(公告)日:2001-07-03

    申请号:US09277093

    申请日:1999-03-26

    IPC分类号: H01L2166

    CPC分类号: H01L22/34

    摘要: Prior to entering into manufacturing of a final production wafer, a series of test wafers are produced to analyze and test various structures. Each of the test wafers include a substrate, an insulating layer overlying the substrate, and a semi-conductive film layer formed over the insulating layer. The film layer is comprised of, for example, poly-silicon and has a predetermined thickness which substantially corresponds to the thickness of a film layer deposited on the final production wafer. The film layer is etched to form a desired pattern of structures and implanted with a dopant to diffuse dopant atoms thoughout. Thereafter, critical dimension measurements of the structures are taken preferably using electrical line width measurements techniques. Variations in critical dimension measurements taken from the test wafer as compared to desired predetermined line width measurements are compensated for prior to manufacturing the final production wafer so as to provide circuits with the desired electrical parameters.

    摘要翻译: 在制造最终生产晶片之前,制造了一系列测试晶片来分析和测试各种结构。 每个测试晶片包括衬底,覆盖衬底的绝缘层和形成在绝缘层上的半导电膜层。 膜层由例如多晶硅构成,并且具有基本对应于沉积在最终生产晶片上的膜层的厚度的预定厚度。 蚀刻膜层以形成期望的结构图案,并注入掺杂剂以扩散掺杂剂原子。 此后,优选使用电线宽度测量技术来获得结构的临界尺寸测量。 在制造最终生产晶片之前补偿与期望的预定线宽测量值相比,从测试晶片获取的临界尺寸测量值的变化,以便为电路提供所需的电参数。

    Method of characterizing linewidth errors in a scanning lithography
system
    2.
    发明授权
    Method of characterizing linewidth errors in a scanning lithography system 失效
    在扫描光刻系统中表征线宽误差的方法

    公开(公告)号:US5985498A

    公开(公告)日:1999-11-16

    申请号:US259928

    申请日:1999-03-01

    IPC分类号: G03F7/20 G03F9/00

    CPC分类号: G03F7/2045

    摘要: A method of characterizing linewidth errors in a lithography system 30 used to delineate a desired pattern onto an exposure site of a wafer 32. The pattern of a reticle 34 is transferred onto an exposure site 56 of a wafer 32 by projecting a slit of light extending in a slit direction y through the reticle while scanning the reticle and the wafer in a scanning direction x relative to the lens. The exposure site 56 is conceptually divided into a grid having one series of lines extending in the scan direction x and another series of lines extending in the slit direction y whereby points corresponding to perpendicular intersections of the lines may each be assigned a pair of coordinates (x,y). The linewidths of the pattern are measured for each of the points (x,y) and a linewidth error value ERROR (x,y) is generated for each of the points (x,y). An ERROR.sub.optical (y) value for each y coordinate is calculated by averaging the ERROR (x,y) values for each group of points (x,y) having a common y coordinate. In this manner, the contribution of optical aberrations to linewidth errors may be determined.

    摘要翻译: 用于表征光刻系统30中的线宽误差的方法,用于将期望的图案划定到晶片32的曝光位置。标线片34的图案通过突出延伸的光的狭缝转移到晶片32的曝光位置56上 在相对于透镜的扫描方向x扫描掩模版和晶片的同时沿切割方向y穿过掩模版。 曝光位置56在概念上被划分为具有在扫描方向x上延伸的一系列线的栅格和沿狭缝方向y延伸的另一系列线,由此可以将对应于线的垂直交点的点分配一对坐标( x,y)。 对于每个点(x,y)测量图案的线宽,并且为每个点(x,y)生成线宽误差值ERROR(x,y)。 通过对具有公共y坐标的每组点(x,y)的ERROR(x,y)值进行平均来计算每个y坐标的ERRORoptical(y)值。 以这种方式,可以确定光学像差对线宽误差的贡献。

    MANAGING REVENUE SHARING BIDS
    3.
    发明申请
    MANAGING REVENUE SHARING BIDS 审中-公开
    管理收入共享人

    公开(公告)号:US20130132201A1

    公开(公告)日:2013-05-23

    申请号:US13813884

    申请日:2010-08-06

    IPC分类号: G06Q30/02

    CPC分类号: G06Q30/0274

    摘要: A bid for a content slot from a content provider is received. The bid includes a revenue-sharing bid. It is determined that the bid is a winning bid and content is presented from the content provider in the content slot. Presentation details are logged that include a time when the content was presented. At a later time, an indication is received of an action, the indication including an indication that the action is responsive to the content having been presented previously. Based on the action, the content provider is charged an appropriate amount based on the revenue sharing bid.

    摘要翻译: 收到来自内容提供商的内容插槽的出价。 出价包括收益分享出价。 确定出价是中标,并且从内容插槽中的内容提供商呈现内容。 记录的内容包括内容呈现的时间。 在稍后的时间,接收到一个动作的指示,该指示包括该动作对先前呈现的内容做出响应的指示。 根据该操作,内容提供商将根据收益共享出价收取适当的金额。

    Technique to separate dose-induced vs. focus-induced CD or linewidth variation
    4.
    发明授权
    Technique to separate dose-induced vs. focus-induced CD or linewidth variation 有权
    分离剂量诱导与焦点诱导的CD或线宽变化的技术

    公开(公告)号:US06414326B1

    公开(公告)日:2002-07-02

    申请号:US09386980

    申请日:1999-08-31

    申请人: Khanh B. Nguyen

    发明人: Khanh B. Nguyen

    IPC分类号: G02B2714

    摘要: A method of identifying a change in focus and a change in illumination from a best focus and a best dose at a region on a substrate corresponding to a point in the image field of a lithographic printing tool is disclosed. The method includes forming a feature having a first pitch and a feature having a second pitch at the region on the substrate, and identifying a linewidth of the features. The identified linewidths are then used to determine the change in focus from the best focus and the change in dose from the best dose which would produce both the first pitch feature and the second pitch feature at the region.

    摘要翻译: 公开了一种在与平版印刷工具的图像场中的点对应的基板上的区域上从最佳焦点和最佳剂量识别焦点变化和照明变化的方法。 该方法包括在衬底上的区域处形成具有第一间距的特征和具有第二间距的特征,以及识别特征的线宽。 所确定的线宽随后用于确定最佳焦点的焦点变化以及来自最佳剂量的剂量变化,该最佳剂量将产生该区域的第一音调特征和第二音调特征。

    Method for coating ultra-thin resist films
    5.
    发明授权
    Method for coating ultra-thin resist films 有权
    超薄抗蚀剂膜的涂布方法

    公开(公告)号:US06326319B1

    公开(公告)日:2001-12-04

    申请号:US09609746

    申请日:2000-07-03

    IPC分类号: H01F1002

    摘要: There is provided a method for applying a lower viscosity coating liquid onto a semiconductor wafer substrate so as to prevent adhesion loss and to maintain low defect level characteristics. This is achieved by priming the substrate with a bonding agent at a temperature in the range of 18° C. to 50° C. for a short amount of time. This is performed prior to the application of a liquid solvent. As a result, there is overcome the problems of poor adhesion to the substrates and high defect levels in the coated UTR films.

    摘要翻译: 提供了一种将低粘度涂布液施加到半导体晶片衬底上以防止粘附损失并保持低缺陷水平特性的方法。 这是通过用粘合剂在18℃至50℃的温度范围内引发基底短时间来实现的。 这是在施加液体溶剂之前进行的。 结果,克服了在涂覆的UTR膜中对基材的粘附性差和高缺陷水平的问题。

    Determination of scanning error in scanner by reticle rotation
    6.
    发明授权
    Determination of scanning error in scanner by reticle rotation 失效
    通过光罩旋转确定扫描仪中的扫描误差

    公开(公告)号:US06208747B1

    公开(公告)日:2001-03-27

    申请号:US09203240

    申请日:1998-12-01

    IPC分类号: G06K900

    摘要: A method (300) of characterizing a lithographic scanning system includes the steps of printing a first pattern (302) using a reticle (220) having a first orientation with respect to the lithographic scanning system and measuring a critical dimension of the first pattern at a plurality of points (310). The method (300) further includes printing a second pattern (320) using the reticle (220) having a second orientation with respect to the lithographic scanning system different than the first orientation and measuring a critical dimension of the second pattern at the plurality of points (322). The measured critical dimension data is then used to determine a reticle critical dimension component and a non-reticle critical dimension component of the patterns at the plurality of points (324) and a scanning system critical dimension component of the patterns is then determined using the non-reticle critical dimension component data along a plurality of points corresponding to a scanning direction of the lithographic scanning system (326).

    摘要翻译: 表征平版印刷扫描系统的方法(300)包括以下步骤:使用相对于光刻扫描系统具有第一取向的掩模版(220)打印第一图案(302),并测量第一图案的临界尺寸 多个点(310)。 方法(300)还包括使用相对于不同于第一取向的光刻扫描系统具有第二取向的掩模版(220)打印第二图案(320),并且在多个点处测量第二图案的临界尺寸 (322)。 然后使用测量的临界尺寸数据来确定多个点(324)上的图案的标线片临界尺寸分量和非标线片临界尺寸分量,并且然后使用非 - 沿着与光刻扫描系统(326)的扫描方向相对应的多个点的重复临界尺寸分量数据。

    Ultra-thin resist and silicon/oxide hard mask for metal etch
    7.
    发明授权
    Ultra-thin resist and silicon/oxide hard mask for metal etch 有权
    用于金属蚀刻的超薄抗蚀剂和硅/氧化物硬掩模

    公开(公告)号:US6156658A

    公开(公告)日:2000-12-05

    申请号:US203774

    申请日:1998-12-02

    摘要: In one embodiment, the present invention relates to a method of forming a metal line, involving the steps of providing a semiconductor substrate comprising a metal layer, an oxide layer over the metal layer, and a silicon layer over the oxide layer; depositing an ultra-thin photoresist over the silicon layer, the ultra-thin photoresist having a thickness less than about 2,000 .ANG.; irradiating the ultra-thin photoresist with electromagnetic radiation having a wavelength of about 250 nm or less; developing the ultra-thin photoresist exposing a portion of the silicon layer; etching the exposed portion of the silicon layer exposing a portion of the oxide layer; etching the exposed portion of the oxide layer exposing a portion of the metal layer; and etching the exposed portion of the metal layer thereby forming the metal line.

    摘要翻译: 在一个实施例中,本发明涉及一种形成金属线的方法,包括以下步骤:提供包括金属层的半导体衬底,金属层上的氧化物层和氧化物层上的硅层; 在硅层上沉积超薄光致抗蚀剂,超薄光致抗蚀剂的厚度小于约2,000安培; 用波长约250nm或更小的电磁辐射照射超薄光致抗蚀剂; 开发暴露一部分硅层的超薄光刻胶; 蚀刻暴露出氧化物层的一部分的硅层的暴露部分; 蚀刻暴露出金属层的一部分的氧化物层的暴露部分; 并且蚀刻金属层的暴露部分从而形成金属线。

    Mark protection scheme with no masking
    8.
    发明授权
    Mark protection scheme with no masking 有权
    标记保护方案,无掩蔽

    公开(公告)号:US06057206A

    公开(公告)日:2000-05-02

    申请号:US410526

    申请日:1999-10-01

    IPC分类号: H01L23/544 H01L21/76

    摘要: A method of forming an alignment mark protection structure is disclosed and includes forming an alignment mark protection layer over a substrate which has an alignment mark associated therewith. The method also includes forming a negative photoresist layer over the alignment mark protection layer and removing a portion of the negative photoresist layer which does not overlie the alignment mark. The removal exposes a portion of the alignment mark protection layer which does not overlie the alignment mark and the exposed portion of the alignment mark protection layer is then removed. Preferably, the removal of a portion of the negative photoresist includes selectively exposing a peripheral portion thereof using an edge-bead removal tool, thereby allowing for the formation of an alignment mark protection structure without an extra masking step.

    摘要翻译: 公开了一种形成对准标记保护结构的方法,并且包括在具有与其相关联的对准标记的衬底上形成对准标记保护层。 该方法还包括在对准标记保护层上形成负光致抗蚀剂层,并且去除不覆盖对准标记的负光致抗蚀剂层的一部分。 去除暴露出不覆盖对准标记的对准标记保护层的一部分,然后去除对准标记保护层的暴露部分。 优选地,去除负光致抗蚀剂的一部分包括使用边缘珠去除工具选择性地暴露其周边部分,从而允许形成对准标记保护结构而没有额外的掩模步骤。

    Device to determine line edge roughness effect on device performance
    10.
    发明授权
    Device to determine line edge roughness effect on device performance 失效
    确定线边缘粗糙度对器件性能的影响的器件

    公开(公告)号:US06370680B1

    公开(公告)日:2002-04-09

    申请号:US09289841

    申请日:1999-04-12

    申请人: Khanh B. Nguyen

    发明人: Khanh B. Nguyen

    IPC分类号: G06F1750

    CPC分类号: H01L22/34

    摘要: A structure (300) for determining an amount of line edge roughness (LER) on a patterned feature (310) includes a plurality of source regions (304) and drain regions (306) formed in a semiconductor substrate (303), with each of the source and drain regions (304, 306) having a channel (320) therebetween. The source regions (304) are electrically isolated from each other and the drain regions (306) are electrically isolated from each other, respectively. The patterned feature of interest (310) is formed over a gate oxide, extends over the channels (320) in a direction which is transverse to the source regions (304) and the drain regions (306), and forms a common gate (310) for a plurality of transistors (302a-302n) formed with the plurality of source regions (304) and drain regions (306). The plurality of transistors (302a-302n) are activated to conduct current therethrough by placing a predetermined voltage on the common gate (310) and the currents of the plurality of transistors (302a-302n) are used to determine the line edge roughness (LER) of the patterned feature 310.

    摘要翻译: 用于确定图案化特征(310)上的线边缘粗糙度(LER)的量的结构(300)包括形成在半导体衬底(303)中的多个源极区(304)和漏极区(306) 源极和漏极区域(304,306)之间具有通道(320)。 源极区域(304)彼此电隔离并且漏极区域(306)分别彼此电隔离。 感兴趣的图案化特征(310)形成在栅极氧化物上方,在横向于源极区(304)和漏极区(306)的方向上在沟道(320)上延伸,并形成公共栅极(310) ),用于形成有多个源极区(304)和漏极区(306)的多个晶体管(302a-302n)。 多个晶体管(302a-302n)被激活以通过在公共栅极(310)上放置预定电压来传导电流,并且使用多个晶体管(302a-302n)的电流来确定线边缘粗糙度(LER )。