公开(公告)号：US20060094179A1

公开(公告)日：2006-05-04

申请号：US11297571

申请日：2005-12-08

申请人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

发明人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

IPC分类号： H01L21/8234 ,  H01L21/336

CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/7395

摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

公开(公告)号：US07005702B1

公开(公告)日：2006-02-28

申请号：US09566219

申请日：2000-05-05

申请人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

发明人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

IPC分类号： H01L29/76 ,  H01L29/94 ,  H01L31/062 ,  H01L31/113 ,  H01L31/119

CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/7395

摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

公开(公告)号：US07507608B2

公开(公告)日：2009-03-24

申请号：US11297571

申请日：2005-12-08

申请人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

发明人： Richard Francis ,  Chiu Ng ,  Hamilton Lu ,  Ranadeep Dutta

IPC分类号： H01L21/332

CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/7395

摘要： The collector or anode of a non-punch through IGBT formed in a float zone silicon wafer is formed by a P doped amorphous silicon layer deposited on the back surface of an ultra thin wafer. A DMOS structure is formed on the top surface of the wafer before the bottom structure is formed. A back contact is formed over the amorphous silicon layer. No alloy step is needed to activate the anode defined by the P type amorphous silicon.

摘要翻译： 形成在浮动区硅晶片中的非穿通IGBT的集电极或阳极由沉积在超薄晶片的背表面上的P掺杂非晶硅层形成。 在形成底部结构之前，在晶片的顶表面上形成DMOS结构。 在非晶硅层上形成背接触。 不需要合金步骤来激活由P型非晶硅限定的阳极。

公开(公告)号：US06627961B1

公开(公告)日：2003-09-30

申请号：US09565151

申请日：2000-05-05

申请人： Richard Francis ,  Ranadeep Dutta ,  Chiu Ng ,  Peter Wood

发明人： Richard Francis ,  Ranadeep Dutta ,  Chiu Ng ,  Peter Wood

IPC分类号： H01L2972

CPC分类号： H01L29/7395

摘要： A high voltage MOSgated semiconductor device has a generally linear MOSFET type forward current versus forward voltage characteristic at low voltage and the high current, low forward drop capability of an IGBT. The device is particularly useful as the control transistor for a television tube deflection coil. The device is formed by a copacked discrete IGBT die and power MOSFET die in which the ratio of the MOSFET die area is preferably about 25% that of the IGBT. Alternatively, the IGBT and MOSFET can be integrated into the same die, with the IGBT and MOSFET elements alternating laterally with one another and overlying respective P+ injection regions and N+ contact regions respectively on the bottom of the die. The MOSFET and IGBT elements are preferably spaced apart by a distance of about 1 minority carrier length (50-100 microns for a 1500 volt device).

摘要翻译： 高压MOS电容半导体器件具有大致线性的MOSFET型正向电流与低电压时的正向电压特性以及IGBT的高电流，低正向下降能力。 该装置特别适用于电视机管偏转线圈的控制晶体管。 该器件由共模封装的分立IGBT管芯和功率MOSFET管芯形成，其中MOSFET管芯面积的比率优选为IGBT的约25％。 或者，IGBT和MOSFET可以集成到相同的管芯中，其中IGBT和MOSFET元件彼此横向交替并且分别叠置在管芯底部上的相应的P +注入区域和N +接触区域。 MOSFET和IGBT元件优选地间隔开约1个少数载流子长度（对于1500伏装置为50-100微米）的距离。

公开(公告)号：US07534666B2

公开(公告)日：2009-05-19

申请号：US11190602

申请日：2005-07-27

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L21/332

CPC分类号： H01L29/7395 ,  H01L29/0834 ,  H01L29/41725 ,  H01L29/66333 ,  Y10S438/904

摘要： A process for forming an NPT IGBT in a thin N type silicon wafer in which the bottom surface of a thin silicon wafer (100 microns thick or less) has a shallow reduced lifetime region in its bottom formed by a light species atom implant to a depth of less than about 2.5 microns. A P+ transparent collector region about 0.5 microns deep is formed in the bottom of the damaged region by a boron implant. A collector contact of Al/Ti/NiV and Ag is sputtered onto the collector region and is annealed at 200° C. to 400° C. for 30 to 60 minutes. A pre-anneal step before applying the collector metal can be carried out in vacuum at 300° C. to 400° C. for 30 to 60 seconds.

摘要翻译： 一种用于在薄N型硅晶片中形成NPT IGBT的工艺，其中薄硅晶片（100微米厚或更小）的底表面在其底部具有浅的减少的寿命区域，其通过光物质原子注入形成深度 小于约2.5微米。 通过硼注入在损伤区域的底部形成约0.5微米深的P +透明集电极区域。 将Al / Ti / NiV和Ag的集电极触点溅射到集电极区域，并在200℃至400℃退火30至60分钟。 在施加集电体金属之前的预退火步骤可以在300℃至400℃的真空中进行30至60秒。

公开(公告)号：US07335947B2

公开(公告)日：2008-02-26

申请号：US11137040

申请日：2005-05-24

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L21/74 ,  H01L29/06 ,  H01L29/36

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/0839 ,  H01L29/0847 ,  H01L29/66348 ,  H01L29/7397

摘要： An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in which the vertically oriented portion of each L-shaped diffused region is formed by directing dopants at an angle toward a sidewall of a trench to form the vertically oriented portion using the edge of the opposing sidewall of the trench as a mask.

摘要翻译： 一种具有L形扩散区域的绝缘栅沟槽型半导体器件，每个扩散区域具有垂直取向部分和从垂直取向部分横向延伸的水平取向部分，以及制造该器件的方法，其中每个 通过使用沟槽的相对侧壁的边缘作为掩模将掺杂剂以一定角度引导到沟槽的侧壁以形成垂直取向的部分来形成L形扩散区域。

公开(公告)号：US20050212039A1

公开(公告)日：2005-09-29

申请号：US11137040

申请日：2005-05-24

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L21/265 ,  H01L21/331 ,  H01L21/336 ,  H01L29/08 ,  H01L29/739 ,  H01L29/78 ,  H01L31/062

CPC分类号： H01L29/7813 ,  H01L21/26586 ,  H01L29/0839 ,  H01L29/0847 ,  H01L29/66348 ,  H01L29/7397

摘要： An insulated gate trench type semiconductor device having L-shaped diffused regions, each diffused region having a vertically oriented portion and a horizontally oriented portion extending laterally from the vertically oriented portion, and a method for manufacturing the device in which the vertically oriented portion of each L-shaped diffused region is formed by directing dopants at an angle toward a sidewall of a trench to form the vertically oriented portion using the edge of the opposing sidewall of the trench as a mask.

公开(公告)号：US06261874B1

公开(公告)日：2001-07-17

申请号：US09593333

申请日：2000-06-14

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L21332

CPC分类号： H01L29/66136 ,  H01L29/0619 ,  H01L29/32 ,  H01L29/872 ,  Y10S257/91

摘要： A soft recovery diode is made by first implanting helium into the die to a location below the P/N junction and the implant annealed. An E-beam radiation process then is applied to the entire wafer and is also annealed. The diode then has very soft recovery characteristics without requiring heavy metal doping.

摘要翻译： 软恢复二极管通过首先将氦注入管芯到位于P / N结下方的位置并进行退火而制成。 然后将电子束辐射过程施加到整个晶片并且也被退火。 二极管然后具有非常柔软的恢复特性，而不需要重金属掺杂。

公开(公告)号：US08314002B2

公开(公告)日：2012-11-20

申请号：US11144727

申请日：2005-06-02

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L21/331

CPC分类号： H01L29/66333 ,  H01L29/0834 ,  H01L29/41741 ,  H01L29/456 ,  H01L29/7395

摘要： A semiconductor device is formed in a thin float zone wafer. Junctions are diffused into the top surface of the wafer and the wafer is then reduced in thickness by removal of material from its bottom surface. A weak collector is then formed in the bottom surface by diffusion of boron (for a P type collector). The weak collector is then formed or activated only over spaced or intermittent areas. This is done by implant of the collector impurity through a screening mask; or by activating only intermittent areas by a laser beam anneal in which the beam is directed to anneal only preselected areas. The resulting device has an effective very low implant dose, producing a reduced switching energy and increased switching speed, as compared to prior art weak collector/anodes and life time killing technologies.

摘要翻译： 半导体器件形成在薄浮动区晶片中。 结点扩散到晶片的顶表面，然后通过从其底表面去除材料来减小晶片的厚度。 然后通过硼的扩散（用于P型收集器）在底表面中形成弱集电体。 然后，弱集电器仅在间隔或间断区域形成或激活。 这是通过通过掩模掩模注入收集器杂质完成的; 或者仅通过激光束退火仅激活间歇区域，其中光束被引导以退火仅预选区域。 与现有技术的弱收集器/阳极和寿命杀死技术相比，所得到的器件具有有效的非常低的注入剂量，产生降低的开关能量和增加的开关速度。

公开(公告)号：US20070034941A1

公开(公告)日：2007-02-15

申请号：US11204074

申请日：2005-08-15

申请人： Richard Francis ,  Chiu Ng

发明人： Richard Francis ,  Chiu Ng

IPC分类号： H01L29/76 ,  H01L21/336

CPC分类号： H01L29/66348 ,  H01L29/7397

摘要： An increased conductivity deep diffusion of the same conductivity type as that of the drift region is provided between adjacent trenches of a trench type IGBT and below the trenches to reduce the on resistance components of the drift region resistance and spreading resistance to current flow when the device is turned on. The deep diffusion has a higher concentration than that of the drift region, and has a width of from 4 to 10 microns. The wafer or die has a total width (or thickness) of about 70 to about 300 microns.

摘要翻译： 在沟槽型IGBT的相邻沟槽之间并且在沟槽下方提供与漂移区相同的导电类型的增加的导电性深扩散，以减小漂移区电阻的导通电阻分量和当电流流动时对电流的扩散电阻 打开 深度扩散具有比漂移区更高的浓度，并且具有4至10微米的宽度。 晶片或管芯具有约70至约300微米的总宽度（或厚度）。