公开(公告)号：US07247227B2

公开(公告)日：2007-07-24

申请号：US09960912

申请日：2001-09-21

申请人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

发明人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

IPC分类号： C25D11/04 ,  C23C28/00

CPC分类号： H01J29/085 ,  G02F1/13439 ,  H01J9/20 ,  H01J31/127 ,  H01J2329/08 ,  H01J2329/865 ,  H01L51/5206

摘要： In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

摘要翻译： 在诸如平板显示器的器件中，当这样的材料将被接触以保护ITO免受例如在阳极接合和其它制造期间的光学和电学缺陷时，在铝层和ITO层之间提供氧化铝层 脚步。 这种氧化铝阻挡层优选地通过以下方式形成：（1）部分或完全地阳极氧化形成在ITO层上的铝层，或者（2）在ITO层上或在形成在ITO层上的铝层上形成氧化铝的原位工艺 ITO层。 在这些工艺中的任一种之后，然后在氧化铝层上形成铝层。

公开(公告)号：US06471879B2

公开(公告)日：2002-10-29

申请号：US09960818

申请日：2001-09-21

申请人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

发明人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

IPC分类号： B29D1100

CPC分类号： H01J29/085 ,  G02F1/13439 ,  H01J9/20 ,  H01J31/127 ,  H01J2329/08 ,  H01J2329/865 ,  H01L51/5206

摘要： In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

摘要翻译： 在诸如平板显示器的器件中，当这样的材料将被接触以保护ITO免受例如在阳极接合和其它制造期间的光学和电学缺陷时，在铝层和ITO层之间提供氧化铝层 脚步。 这种氧化铝阻挡层优选地通过以下方式形成：（1）部分或完全地阳极氧化形成在ITO层上的铝层，或者（2）在ITO层上或在形成在ITO层上的铝层上形成氧化铝的原位工艺 ITO层。 在这些工艺中的任一种之后，然后在氧化铝层上形成铝层。

公开(公告)号：US06322712B1

公开(公告)日：2001-11-27

申请号：US09387910

申请日：1999-09-01

申请人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

发明人： Robert J. Hanson ,  Won-Joo Kim ,  Mike E. Pugh

IPC分类号： B29D900

CPC分类号： H01J29/085 ,  G02F1/13439 ,  H01J9/20 ,  H01J31/127 ,  H01J2329/08 ,  H01J2329/865 ,  H01L51/5206

摘要： In devices such as flat panel displays, an aluminum oxide layer is provided between an aluminum layer and an ITO layer when such materials would otherwise be in contact to protect the ITO from optical and electrical defects sustained, for instance, during anodic bonding and other fabrication steps. This aluminum oxide barrier layer is preferably formed either by: (1) partially or completely anodizing an aluminum layer formed over the ITO layer, or (2) an in situ process forming aluminum oxide either over the ITO layer or over an aluminum layer formed on the ITO layer. After either of these processes, an aluminum layer is then formed over the aluminum oxide layer.

摘要翻译： 在诸如平板显示器的器件中，当这样的材料将被接触以保护ITO免受例如在阳极接合和其它制造期间的光学和电学缺陷时，在铝层和ITO层之间提供氧化铝层 脚步。 这种氧化铝阻挡层优选地通过以下方式形成：（1）部分或完全地阳极氧化形成在ITO层上的铝层，或者（2）在ITO层上或在形成在ITO层上的铝层上形成氧化铝的原位工艺 ITO层。 在这些工艺中的任一种之后，然后在氧化铝层上形成铝层。

公开(公告)号：US06413135B1

公开(公告)日：2002-07-02

申请号：US09514962

申请日：2000-02-29

申请人： Won-Joo Kim ,  Robert J. Hanson ,  David H. Chun ,  Gary A. Evans ,  Seungwoo Lee ,  Jim J. Browning

发明人： Won-Joo Kim ,  Robert J. Hanson ,  David H. Chun ,  Gary A. Evans ,  Seungwoo Lee ,  Jim J. Browning

IPC分类号： H01J924

CPC分类号： H01J29/028 ,  H01J9/185 ,  H01J9/241 ,  H01J9/242 ,  H01J29/864 ,  H01J31/123 ,  H01J2329/8625 ,  Y10T428/12604 ,  Y10T428/24744 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A multi-layered structure, and method for producing same, which may include at least one glass layer anodically bonded to an intermediate layer. The intermediate layer may function as a anodic bonding layer, an etch stop layer, and/or a hard mask layer. A template may be formed of the multi-layered structure by forming a desired pattern of openings therein by way of, for example, etching. Such a template may, for example, be used in the alignment and adherence of spacer structures to an electrode plate during the fabrication of flat panel displays. When used in this context, the construction of such a template results in more precise control of the patterning and sizing of the holes formed therein which thereby allows for more precise placement of spacer structures as well as the use of spacer structures exhibiting relatively higher aspect ratios during the fabrication of flat panel displays.

摘要翻译： 多层结构及其制造方法，其可以包括至少一个阳极结合到中间层的玻璃层。 中间层可用作阳极结合层，蚀刻停止层和/或硬掩模层。 模板可以通过例如通过蚀刻在其中形成所需的开口图案而由多层结构形成。 例如，在制造平板显示器期间，这种模板可以用于将间隔物结构对准和粘附到电极板上。 当在这种情况下使用时，这种模板的结构可以更精确地控制在其中形成的孔的图案化和尺寸化，从而允许间隔结构的更精确的放置以及使用表现出相对更高的纵横比的间隔结构 在制造平板显示器期间。

公开(公告)号：US06716081B2

公开(公告)日：2004-04-06

申请号：US10113044

申请日：2002-04-01

申请人： Won-Joo Kim ,  Robert J. Hanson ,  David H. Chun ,  Gary A. Evans ,  Seungwoo Lee ,  Jim J. Browning

发明人： Won-Joo Kim ,  Robert J. Hanson ,  David H. Chun ,  Gary A. Evans ,  Seungwoo Lee ,  Jim J. Browning

IPC分类号： H01J924

CPC分类号： H01J29/028 ,  H01J9/185 ,  H01J9/241 ,  H01J9/242 ,  H01J29/864 ,  H01J31/123 ,  H01J2329/8625 ,  Y10T428/12604 ,  Y10T428/24744 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A multi-layered structure, and method for producing same, which may include at least one glass layer anodically bonded to an intermediate layer. The intermediate layer may function as an anodic bonding layer, an etch stop layer, and/or a hard mask layer. A template may be formed of the multi-layered structure by forming a desired pattern of openings therein by way of, for example, etching. Such a template may, for example, be used in the alignment and adherence of spacer structures to an electrode plate during the fabrication of flat panel displays. When used in this context, the construction of such a template results in more precise control of the patterning and sizing of the holes formed therein which thereby allows for more precise placement of spacer structures as well as the use of spacer structures exhibiting relatively higher aspect ratios during the fabrication of flat panel displays.

摘要翻译： 多层结构及其制造方法，其可以包括至少一个阳极结合到中间层的玻璃层。 中间层可用作阳极结合层，蚀刻停止层和/或硬掩模层。 模板可以通过例如通过蚀刻在其中形成所需的开口图案而由多层结构形成。 例如，在制造平板显示器期间，这种模板可以用于将间隔物结构对准和粘附到电极板上。 当在这种情况下使用时，这种模板的结构可以更精确地控制在其中形成的孔的图案化和尺寸化，从而允许间隔结构的更精确的放置以及使用表现出相对更高的纵横比的间隔结构 在制造平板显示器期间。

公开(公告)号：US08981444B2

公开(公告)日：2015-03-17

申请号：US13302090

申请日：2011-11-22

申请人： Kevin J. Torek ,  Mark Fischer ,  Robert J. Hanson

发明人： Kevin J. Torek ,  Mark Fischer ,  Robert J. Hanson

IPC分类号： H01L27/06 ,  H01L29/78 ,  H01L29/66 ,  H01L27/108

CPC分类号： H01L29/7851 ,  H01L27/10808 ,  H01L27/10826 ,  H01L27/10879 ,  H01L29/66795 ,  H01L29/7853 ,  H01L29/7854

摘要： Novel etch techniques are provided for shaping silicon features below the photolithographic resolution limits. FinFET devices are defined by recessing oxide and exposing a silicon protrusion to an isotropic etch, at least in the channel region. In one implementation, the protrusion is contoured by a dry isotropic etch having excellent selectivity, using a downstream microwave plasma etch.

摘要翻译： 提供了新颖的蚀刻技术，用于在低于光刻分辨率极限的条件下成形硅特征。 FinFET器件通过凹陷氧化物和至少在沟道区域中将硅突起暴露于各向同性蚀刻来限定。 在一个实施方案中，使用下游微波等离子体蚀刻，通过具有优异选择性的干各向同性蚀刻来形成突起。

公开(公告)号：US08426273B2

公开(公告)日：2013-04-23

申请号：US12969418

申请日：2010-12-15

申请人： Robert J. Hanson ,  Sanh D. Tang

发明人： Robert J. Hanson ,  Sanh D. Tang

IPC分类号： H01L21/336

CPC分类号： H01L29/66666 ,  H01L21/26513 ,  H01L21/823418 ,  H01L21/823437 ,  H01L21/823487 ,  H01L29/6659 ,  H01L29/66621 ,  H01L29/7834

摘要： The invention includes methods of forming field effect transistors. In one implementation, the invention encompasses a method of forming a field effect transistor on a substrate, where the field effect transistor comprises a pair of conductively doped source/drain regions, a channel region received intermediate the pair of source/drain regions, and a transistor gate received operably proximate the channel region. Such implementation includes conducting a dopant activation anneal of the pair of source/drain regions prior to depositing material from which a conductive portion of the transistor gate is made. Other aspects and implementations are contemplated.

摘要翻译： 本发明包括形成场效应晶体管的方法。 在一个实施方案中，本发明包括在衬底上形成场效应晶体管的方法，其中场效应晶体管包括一对导电掺杂的源极/漏极区域，在该对源极/漏极区域之间接收的沟道区域，以及 晶体管栅极可靠地接收在沟道区域。 这种实现包括在沉积材料之前对该对源极/漏极区进行掺杂剂激活退火，从而制造晶体管栅极的导电部分。 考虑了其他方面和实现。

公开(公告)号：US20110126824A1

公开(公告)日：2011-06-02

申请号：US12780783

申请日：2010-05-14

申请人： William M. Conlon ,  Peter M. Tanner ,  Milton Venetos ,  Robert J. Hanson

发明人： William M. Conlon ,  Peter M. Tanner ,  Milton Venetos ,  Robert J. Hanson

IPC分类号： F24J2/38

CPC分类号： F22B1/006 ,  F22B35/16 ,  F24S20/20 ,  F24S30/425 ,  F24S50/00 ,  F24S50/40 ,  F24S2020/16 ,  F24S2023/872 ,  Y02E10/41 ,  Y02E10/47

摘要： Methods and systems for generating steam using solar energy are provided here. The methods and systems can be used to generate steam of a desired quality, e.g. about 70%, or superheated steam. Some methods for producing steam of a desired quality comprise flowing water into an inlet of receiver in a linear Fresnel reflector system, wherein the receiver comprises multiple parallel tubes ti connected in parallel, and i=1,k, and irradiating each tube ti along its respective length Li with solar radiation so that solar radiation absorbed at each tube generates thermal input along its length and so that water begins to boil in at least one of the tubes at a point λi along its length. The methods comprise using one or more temperatures Ti in an economizer region of a tube ti or one or more changes in length of the tubes as input to a controller that controls mass flow of water into each of the multiple tubes, thereby controlling quality of steam exiting the receiver.

摘要翻译： 本文提供了使用太阳能产生蒸汽的方法和系统。 这些方法和系统可用于产生所需质量的蒸汽，例如， 约70％，或过热蒸汽。 用于产生所需质量的蒸汽的一些方法包括在线性菲涅耳反射器系统中将水流入接收器的入口，其中接收器包括并联连接的多个平行管ti，并且i = 1，k，并沿其沿着每个管ti 具有太阳辐射的相应长度Li，使得在每个管吸收的太阳辐射沿着其长度产生热输入，并且使得水在其长度上的点λi处开始在至少一个管中沸腾。 这些方法包括在管的节能器区域中使用一个或多个温度Ti或管的长度的一个或多个变化作为控制器的输入，该控制器控制水流入多个管中的每一个，从而控制蒸汽的质量 退出接收器。

公开(公告)号：US07935602B2

公开(公告)日：2011-05-03

申请号：US11168861

申请日：2005-06-28

申请人： Hongmei Wang ,  Fred D. Fishburn ,  Janos Fucsko ,  T. Earl Allen ,  Richard H. Lane ,  Robert J. Hanson ,  Kevin R. Shea

发明人： Hongmei Wang ,  Fred D. Fishburn ,  Janos Fucsko ,  T. Earl Allen ,  Richard H. Lane ,  Robert J. Hanson ,  Kevin R. Shea

IPC分类号： H01L21/336 ,  H01L21/311 ,  H01L21/302

CPC分类号： H01L21/76232

摘要： The invention includes methods of forming isolation regions. An opening can be formed to extend into a semiconductor material, and an upper periphery of the opening can be protected with a liner while a lower periphery is unlined. The unlined portion can then be etched to form a widened region of the opening. Subsequently, the opening can be filled with insulative material to form an isolation region. Transistor devices can then be formed on opposing sides of the isolation region, and electrically isolated from one another with the isolation region. The invention also includes semiconductor constructions containing an electrically insulative isolation structure extending into a semiconductor material, with the structure having a bulbous bottom region and a stem region extending upwardly from the bottom region to a surface of the semiconductor material.

摘要翻译： 本发明包括形成隔离区域的方法。 可以形成开口以延伸到半导体材料中，并且可以用衬垫保护开口的上周边，而下边缘是无衬里的。 然后可以对无衬里部分进行蚀刻以形成开口的加宽区域。 随后，开口可以用绝缘材料填充以形成隔离区域。 晶体管器件然后可以形成在隔离区域的相对侧上，并且与隔离区域彼此电隔离。 本发明还包括包含延伸到半导体材料中的电绝缘隔离结构的半导体结构，其结构具有球形底部区域和从底部区域向上延伸到半导体材料表面的杆区域。

公开(公告)号：US07892942B2

公开(公告)日：2011-02-22

申请号：US11774709

申请日：2007-07-09

申请人： Robert J. Hanson ,  Janos Fucsko

发明人： Robert J. Hanson ,  Janos Fucsko

IPC分类号： H01L21/76

CPC分类号： H01L21/76224 ,  H01L21/02164 ,  H01L21/02222 ,  H01L21/02282 ,  H01L21/02337 ,  H01L21/0234 ,  H01L21/3125 ,  H01L21/31612

摘要： Some embodiments include methods of forming isolation regions in which spin-on material (for example, polysilazane) is converted to a silicon dioxide-containing composition. The conversion may utilize one or more oxygen-containing species (such as ozone) and a temperature of less than or equal to 300° C. In some embodiments, the spin-on material is formed within an opening in a semiconductor material to form a trenched isolation region. Other dielectric materials may be formed within the opening in addition to the silicon dioxide-containing composition formed from the spin-on material. Such other dielectric materials may include silicon dioxide formed by chemical vapor deposition and/or silicon dioxide formed by high-density plasma chemical vapor deposition.

摘要翻译： 一些实施方案包括形成其中旋涂材料（例如，聚硅氮烷）转化为含二氧化硅的组合物的隔离区域的方法。 转化可以利用一种或多种含氧物质（例如臭氧）和小于或等于300℃的温度。在一些实施方案中，旋涂材料形成在半导体材料的开口内以形成 沟隔离区。 除了由旋涂材料形成的含二氧化硅的组合物之外，可以在开口内形成其它电介质材料。 这种其它介电材料可以包括通过化学气相沉积形成的二氧化硅和/或通过高密度等离子体化学气相沉积形成的二氧化硅。