公开(公告)号：US5226958A

公开(公告)日：1993-07-13

申请号：US683463

申请日：1991-04-11

Applicant: Ronald R. Bowman ,  Brian C. Bowman

Inventor： Ronald R. Bowman ,  Brian C. Bowman

IPC: B29C73/16 ,  B60C17/00

CPC classification number: B60C17/00 ,  B29C73/163 ,  B29L2023/245 ,  B29L2030/00

Abstract: The present invention provides mobile sealant compositions that are particularly useful for bicycle tire tubes and the like. The improvements include a novel particulate for use in the sealant composition that is greatly conformable for closing pores in a plug. Another improvement includes a balanced fiber composition as part of the sealant. Also, the carrier fluid is formulated to substantially reduce losses due to gaseous diffusion by preferably utilizing high levels of ethylene glycol, such as greater than about 60 percent.

公开(公告)号：US20100025809A1

公开(公告)日：2010-02-04

申请号：US12182699

申请日：2008-07-30

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: H01L29/732 ,  H01L21/331

CPC classification number: H01L29/8613 ,  H01L29/0661 ,  H01L29/66272 ,  H01L29/7322 ,  H01L29/7325 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: An integrated circuit having a substrate with a first conductivity type of semiconductor material. A buried layer is formed in the substrate. The buried layer has a second conductivity type of semiconductor material. A first semiconductor layer is formed over the buried layer. The first semiconductor layer has the second conductivity type of semiconductor material. A trench is formed through the first semiconductor layer and buried layer and extends into the substrate. The trench is lined with an insulating layer and filled with an insulating material. A second semiconductor layer is formed in the first semiconductor layer. The second semiconductor layer has the first conductivity type of semiconductor material. A third semiconductor layer is formed in the second semiconductor layer. The third semiconductor layer has the second conductivity type of semiconductor material. The first, second, and third semiconductor layers form the collector, base, and emitter of a bipolar transistor.

Abstract translation: 一种具有具有第一导电类型的半导体材料的衬底的集成电路。 在衬底中形成掩埋层。 掩埋层具有第二导电类型的半导体材料。 在掩埋层上形成第一半导体层。 第一半导体层具有第二导电类型的半导体材料。 通过第一半导体层和掩埋层形成沟槽并延伸到衬底中。 沟槽衬有绝缘层并填充绝缘材料。 在第一半导体层中形成第二半导体层。 第二半导体层具有第一导电类型的半导体材料。 在第二半导体层中形成第三半导体层。 第三半导体层具有第二导电类型的半导体材料。 第一，第二和第三半导体层形成双极晶体管的集电极，基极和发射极。

公开(公告)号：US4859848A

公开(公告)日：1989-08-22

申请号：US107011

申请日：1987-10-09

Applicant: Ronald R. Bowman ,  Ingvar E. Sodal ,  Thomas A. Wilke ,  Frank Weller

Inventor： Ronald R. Bowman ,  Ingvar E. Sodal ,  Thomas A. Wilke ,  Frank Weller

IPC: G01N27/62 ,  H01J49/06 ,  H01J49/26 ,  H01J49/28 ,  H01J49/32

CPC classification number: H01J49/28 ,  H01J49/32

Abstract: An apparatus is provided for use in determining the components of an inputted gas mixture. The apparatus includes a single piece body or framework preferably made of a high insulating material, such as ceramic. The body includes a number of cut-outs for receiving or incorporating hardware used in generating ions, controlling their movement, and directing them to an ion collector plate. One of the cut-outs formed in the insulating body receives an ion source assembly. Another of the cutouts is a passageway with metallized material coated along the walls thereof for use in generating an electric field. A third cut-out receives and is associated with a magnet assembly used in directing ion movement towards the collector plate. The single body and cut-out construction reduces the number of individual parts, improves the assembly of such parts and reduces adjustment time associated with such parts. The magnetic assembly is formed using pairs of identical parts in a sandwich-like construction to also facilitate assembly of the apparatus. The body also includes a number of feed through holes for receiving conducting pins. The locations of the holes are precisely formed in the body and the conducting pins are used in providing electrical communication between apparatus parts and control hardware.

Abstract translation: 提供了一种用于确定输入的气体混合物的组分的装置。 该装置包括优选由诸如陶瓷的高绝缘材料制成的单件本体或框架。 身体包括多个切口，用于接收或并入用于产生离子的硬件，控制它们的移动，并将它们引导到离子收集板。 在绝缘体中形成的切口之一接收离子源组件。 另一个切口是具有沿其壁涂覆的金属化材料的通道，用于产生电场。 第三切口接收并与用于引导离子向收集板移动的磁体组件相关联。 单体和切口结构减少了单个部件的数量，改进了这些部件的组装，并减少了与这些部件相关联的调整时间。 磁性组件使用夹层结构中的成对相同部件形成，以便于装置的组装。 主体还包括多个用于接收导电销的馈通孔。 孔的位置精确地形成在主体中，并且导电销用于在设备部件和控制硬件之间提供电连接。

公开(公告)号：US20120175729A1

公开(公告)日：2012-07-12

申请号：US13427543

申请日：2012-03-22

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: H01L29/06

CPC classification number: H01L21/76224 ,  H01L29/0611 ,  H01L29/0661 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7322 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: A discrete semiconductor device has a substrate with a first conductivity type of semiconductor material. A first semiconductor layer is formed over the substrate. The first semiconductor layer having the first conductivity type of semiconductor material. A second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second conductivity type of semiconductor material. A trench is formed through the second semiconductor layer and extends into the second semiconductor layer. The trench has a rounded or polygonal shape and vertical sidewalls. The trench is lined with an insulating layer and filled with an insulating material. A boundary between the first and second semiconductor layers forms a p-n junction. The trench surrounds the p-n junction to terminate the electric field of a voltage imposed on the second semiconductor layer. The discrete semiconductor device can also be a transistor, thyristor, triac, or transient voltage suppressor.

Abstract translation: 分立半导体器件具有具有第一导电类型的半导体材料的衬底。 在衬底上形成第一半导体层。 第一半导体层具有第一导电类型的半导体材料。 第一半导体层上的第二半导体层。 第二半导体层具有第二导电类型的半导体材料。 通过第二半导体层形成沟槽并延伸到第二半导体层。 沟槽具有圆形或多边形形状和垂直侧壁。 沟槽衬有绝缘层并填充绝缘材料。 第一和第二半导体层之间的边界形成p-n结。 沟槽围绕p-n结以终止施加在第二半导体层上的电压的电场。 分立半导体器件也可以是晶体管，晶闸管，三端双向可控硅或瞬态电压抑制器。

公开(公告)号：US4132550A

公开(公告)日：1979-01-02

申请号：US744831

申请日：1976-11-24

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: G03F7/00 ,  G03C5/00 ,  G03C1/68

CPC classification number: G03F7/00

Abstract: A germanium mesa transistor is fabricated having an epitaxially grown base region and an aluminum alloy emitter in the epitaxially grown layer spaced from the collector junction, and having a gold-comprising base electrode surrounding the emitter and closely spaced therefrom. The gold contact is formed by photolithographic and selective etching techniques, followed by the formation of the aluminum emitter, which is also formed by photolithographic and selective etching techniques. A key step is the selective removal of the aluminum from the germanium wafer without disturbing the gold contact.

Abstract translation: 制造的锗台面晶体管具有外延生长的基极区域和与集电极结合部分间隔的外延生长层中的铝合金发射体，并且具有围绕发射极并与其紧密间隔的含金基底电极。 金接触通过光刻和选择性蚀刻技术形成，随后形成铝发射体，其也通过光刻和选择性蚀刻技术形成。 关键的步骤是从锗晶片中选择性地去除铝，而不会干扰金接触。

公开(公告)号：US4008477A

公开(公告)日：1977-02-15

申请号：US590355

申请日：1975-06-25

Applicant: Tadeusz M. Babij ,  Ronald R. Bowman ,  Paul F. Wacker

Inventor： Tadeusz M. Babij ,  Ronald R. Bowman ,  Paul F. Wacker

IPC: H01Q9/16 ,  H01Q19/09 ,  H01Q23/00 ,  H01Q1/42 ,  H01Q3/16

CPC classification number: H01Q9/16 ,  H01Q19/09 ,  H01Q23/00

Abstract: A novel antenna is disclosed which provides inherent filtering action by ch the frequency response curve of the antenna can be shaped. In the preferred inventive embodiment, the antenna comprises at least one elongated receiving element, and preferably two such elements in the form of a dipole, both elements being constructed, at least in part, of an electrically resistive material. A detector, such as a diode detector, is directly coupled to the receiving elements. The resistance of the receiving element and the capacitances of the receiving element and the detector form a distributed parameter RC filter, the values of which parameters can be carefully controlled so as to provide the desired frequency response curve shaping. In the preferred inventive embodiment, a conductive strip is disposed along the length of and preferably to both sides of each receiving element, with a layer of dielectric material being sandwiched therebetween, whereby the filtering action is enhanced.

Abstract translation: 公开了一种新颖的天线，其提供天线的频率响应曲线可以被成形的固有滤波动作。 在优选的本发明实施例中，天线包括至少一个细长的接收元件，并且优选地为偶极形式的两个这样的元件，两个元件至少部分地由电阻材料构成。 诸如二极管检测器的检测器直接耦合到接收元件。 接收元件的电阻和接收元件和检测器的电容形成分布参数RC滤波器，可以仔细地控制哪些参数的值，以便提供期望的频率响应曲线成形。 在优选的本发明实施例中，沿着每个接收元件的长度并优选地设置导电条，其中夹在介质材料层之间，从而增强了滤波作用。

公开(公告)号：US08895399B2

公开(公告)日：2014-11-25

申请号：US13568410

申请日：2012-08-07

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: H01L21/331 ,  H01L29/74 ,  H01L29/06 ,  H01L29/861 ,  H01L29/747 ,  H01L29/732 ,  H01L29/66

CPC classification number: H01L29/8613 ,  H01L29/0661 ,  H01L29/66272 ,  H01L29/7322 ,  H01L29/7325 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: An integrated circuit having a substrate with a first conductivity type of semiconductor material. A buried layer is formed in the substrate. The buried layer has a second conductivity type of semiconductor material. A first semiconductor layer is formed over the buried layer. The first semiconductor layer has the second conductivity type of semiconductor material. A trench is formed through the first semiconductor layer and buried layer and extends into the substrate. The trench is lined with an insulating layer and filled with an insulating material. A second semiconductor layer is formed in the first semiconductor layer. The second semiconductor layer has the first conductivity type of semiconductor material. A third semiconductor layer is formed in the second semiconductor layer. The third semiconductor layer has the second conductivity type of semiconductor material. The first, second, and third semiconductor layers form the collector, base, and emitter of a bipolar transistor.

Abstract translation: 一种具有具有第一导电类型的半导体材料的衬底的集成电路。 在衬底中形成掩埋层。 掩埋层具有第二导电类型的半导体材料。 在掩埋层上形成第一半导体层。 第一半导体层具有第二导电类型的半导体材料。 通过第一半导体层和掩埋层形成沟槽并延伸到衬底中。 沟槽衬有绝缘层并填充绝缘材料。 在第一半导体层中形成第二半导体层。 第二半导体层具有第一导电类型的半导体材料。 在第二半导体层中形成第三半导体层。 第三半导体层具有第二导电类型的半导体材料。 第一，第二和第三半导体层形成双极晶体管的集电极，基极和发射极。

公开(公告)号：US20100025807A1

公开(公告)日：2010-02-04

申请号：US12182660

申请日：2008-07-30

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: H01L29/00 ,  H01L21/762

CPC classification number: H01L21/76224 ,  H01L29/0611 ,  H01L29/0661 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7322 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: A discrete semiconductor device has a substrate with a first conductivity type of semiconductor material. A first semiconductor layer is formed over the substrate. The first semiconductor layer having the first conductivity type of semiconductor material. A second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second conductivity type of semiconductor material. A trench is formed through the second semiconductor layer and extends into the second semiconductor layer. The trench has a rounded or polygonal shape and vertical sidewalls. The trench is lined with an insulating layer and filled with an insulating material. A boundary between the first and second semiconductor layers forms a p-n junction. The trench surrounds the p-n junction to terminate the electric field of a voltage imposed on the second semiconductor layer. The discrete semiconductor device can also be a transistor, thyristor, triac, or transient voltage suppressor.

Abstract translation: 分立半导体器件具有具有第一导电类型的半导体材料的衬底。 在衬底上形成第一半导体层。 第一半导体层具有第一导电类型的半导体材料。 第一半导体层上的第二半导体层。 第二半导体层具有第二导电类型的半导体材料。 通过第二半导体层形成沟槽并延伸到第二半导体层。 沟槽具有圆形或多边形形状和垂直侧壁。 沟槽衬有绝缘层并填充绝缘材料。 第一和第二半导体层之间的边界形成p-n结。 沟槽围绕p-n结以终止施加在第二半导体层上的电压的电场。 分立半导体器件也可以是晶体管，晶闸管，三端双向可控硅或瞬态电压抑制器。

公开(公告)号：USRE33863E

公开(公告)日：1992-03-31

申请号：US136027

申请日：1987-12-21

Applicant: Ronald R. Bowman ,  Ingvar E. Sodal

Inventor： Ronald R. Bowman ,  Ingvar E. Sodal

IPC: F16K31/00

CPC classification number: F16K31/007

Abstract: An actuator system is provided which includes a force transfer element and a force receiving element. A viscous material interconnects the force transfer element and the force receiving element. A workpiece, such as a valve member, is connected to the force receiving element. When a controlled force is applied to the force transfer element, the controlled force and resulting movement are rigidly coupled using the viscous material to the force receiving element so that the workpiece can be moved or otherwise operably controlled. When an uncontrolled force is received by the force transfer element, in which the movement of the force transfer element is slow relative to the deformation of the viscous material, there is no coupling of the uncontrolled force and resulting movement to the workpiece. As a result, the actuator system is able to couple rapid movements using the viscous material, while relatively slow movements are not coupled. Uncontrolled forces contemplated by this invention include forces resulting from stress, aging drift, and temperature variations associated with the force transfer element and the force receiving element.

公开(公告)号：US08766398B2

公开(公告)日：2014-07-01

申请号：US13427543

申请日：2012-03-22

Applicant: Ronald R. Bowman

Inventor： Ronald R. Bowman

IPC: H01L21/70

CPC classification number: H01L21/76224 ,  H01L29/0611 ,  H01L29/0661 ,  H01L29/66272 ,  H01L29/732 ,  H01L29/7322 ,  H01L29/74 ,  H01L29/747 ,  H01L29/861

Abstract: A discrete semiconductor device has a substrate with a first conductivity type of semiconductor material. A first semiconductor layer is formed over the substrate. The first semiconductor layer having the first conductivity type of semiconductor material. A second semiconductor layer over the first semiconductor layer. The second semiconductor layer has a second conductivity type of semiconductor material. A trench is formed through the second semiconductor layer and extends into the second semiconductor layer. The trench has a rounded or polygonal shape and vertical sidewalls. The trench is lined with an insulating layer and filled with an insulating material. A boundary between the first and second semiconductor layers forms a p-n junction. The trench surrounds the p-n junction to terminate the electric field of a voltage imposed on the second semiconductor layer. The discrete semiconductor device can also be a transistor, thyristor, triac, or transient voltage suppressor.

Abstract translation: 分立半导体器件具有具有第一导电类型的半导体材料的衬底。 在衬底上形成第一半导体层。 第一半导体层具有第一导电类型的半导体材料。 第一半导体层上的第二半导体层。 第二半导体层具有第二导电类型的半导体材料。 通过第二半导体层形成沟槽并延伸到第二半导体层。 沟槽具有圆形或多边形形状和垂直侧壁。 沟槽衬有绝缘层并填充绝缘材料。 第一和第二半导体层之间的边界形成p-n结。 沟槽围绕p-n结以终止施加在第二半导体层上的电压的电场。 分立半导体器件也可以是晶体管，晶闸管，三端双向可控硅或瞬态电压抑制器。