公开(公告)号：US08987898B2

公开(公告)日：2015-03-24

申请号：US13154360

申请日：2011-06-06

申请人： Rupert Burbidge ,  David Paul Jones ,  Amarjit Dhadda ,  Robert Montgomery

发明人： Rupert Burbidge ,  David Paul Jones ,  Amarjit Dhadda ,  Robert Montgomery

IPC分类号： H01L23/488 ,  H01L21/304 ,  H01L21/683

CPC分类号： H01L21/304 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.

摘要翻译： 根据一个实施例，半导体晶片包括用于提供形成在半导体晶片的功能区域上的器件触点的多个焊料凸块和围绕功能区域的一个或多个支撑环。 一个或多个支撑环和多个焊料凸块被形成为具有基本匹配的高度。 一个或多个支撑环的存在使得半导体晶片在半导体晶片上执行变薄处理之后，在功能区域中具有基本均匀的厚度。 制造半导体晶片的方法包括在功能区域之上形成多个焊料凸块，以及在对半导体晶片进行稀化处理之前形成围绕功能区域的一个或多个支撑环。

公开(公告)号：US20120306072A1

公开(公告)日：2012-12-06

申请号：US13154360

申请日：2011-06-06

申请人： Rupert Burbidge ,  David Paul Jones ,  Amarjit Dhadda ,  Robert Montgomery

发明人： Rupert Burbidge ,  David Paul Jones ,  Amarjit Dhadda ,  Robert Montgomery

IPC分类号： H01L23/488 ,  H01L21/60

CPC分类号： H01L21/304 ,  H01L21/6836 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2924/0002 ,  H01L2924/00

摘要： According to one embodiment, a semiconductor wafer comprises a plurality of solder bumps for providing device contacts formed over a functional region of the semiconductor wafer, and one or more support rings surrounding the functional region. The one or more support rings and the plurality of solder bumps are formed so as to have substantially matching heights. The presence of the one or more support rings causes the semiconductor wafer to have a substantially uniform thickness in the functional region after a thinning process is performed on the semiconductor wafer. A method for fabricating the semiconductor wafer comprises forming the plurality of solder bumps over the functional region, and forming the one or more support rings surrounding the functional region before performing the thinning process on the semiconductor wafer.

摘要翻译： 根据一个实施例，半导体晶片包括用于提供形成在半导体晶片的功能区域上的器件触点的多个焊料凸块和围绕功能区域的一个或多个支撑环。 一个或多个支撑环和多个焊料凸块被形成为具有基本匹配的高度。 一个或多个支撑环的存在使得半导体晶片在半导体晶片上执行变薄处理之后，在功能区域中具有基本均匀的厚度。 制造半导体晶片的方法包括在功能区域之上形成多个焊料凸块，以及在对半导体晶片进行稀化处理之前形成围绕功能区域的一个或多个支撑环。

公开(公告)号：US20120175688A1

公开(公告)日：2012-07-12

申请号：US13187362

申请日：2011-07-20

申请人： Rupert Burbidge ,  David Paul Jones

发明人： Rupert Burbidge ,  David Paul Jones

IPC分类号： H01L29/772

CPC分类号： H01L24/06 ,  H01L23/4824 ,  H01L23/492 ,  H01L24/17 ,  H01L24/33 ,  H01L2224/0401 ,  H01L2224/05553 ,  H01L2224/0603 ,  H01L2224/06131 ,  H01L2224/06133 ,  H01L2224/06152 ,  H01L2224/06154 ,  H01L2224/0616 ,  H01L2224/06164 ,  H01L2224/06179 ,  H01L2224/06181 ,  H01L2224/06182 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/00

摘要： Some exemplary embodiments of a semiconductor package including a semiconductor device having electrodes on opposite major surfaces connectable to a planar support surface without a bondwire and a control electrode disposed in a corner position for reducing top-metal spreading resistance and device on-resistance have been disclosed. One exemplary structure comprises a semiconductor device having a first major surface including a first electrode and a second major surface including a second electrode and a control electrode, wherein the control electrode is disposed in a corner of the second major surface, and wherein the first electrode, the second electrode, and the control electrode are electrically connectable to a planar support surface without a bondwire. The pads of the device may be arranged in a balanced grid to maintain device stability during integration. A minimum gap distance between die pads allows the placement of vias in the planar support surface.

摘要翻译： 已经公开了半导体封装的一些示例性实施例，其包括半导体器件，其在相对的主表面上具有可连接到平面支撑表面而没有接合线的电极的半导体器件，以及设置在拐角位置以降低顶部金属扩散电阻和器件导通电阻的控制电极。 。 一个示例性结构包括具有包括第一电极的第一主表面和包括第二电极和控制电极的第二主表面的半导体器件，其中控制电极设置在第二主表面的角部，并且其中第一电极 ，第二电极和控制电极可电连接到没有接合线的平面支撑表面。 器件的焊盘可以布置在平衡网格中，以在集成期间保持器件的稳定性。 管芯焊盘之间的最小间隙距离允许将通孔放置在平面支撑表面中。