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公开(公告)号：US20160180493A1
公开(公告)日：2016-06-23
申请号：US14574093
申请日：2014-12-17
CPC分类号： G06T1/60 , G06T1/20 , G06T2200/28 , H04N13/139
摘要： Methods for preprocessing pixel data using a Direct Memory Access (DMA) engine during a data transfer of the pixel data from a first memory (e.g., a DRAM) to a second memory (e.g., a local cache) are described. The pixel data may derive from an image capturing device (e.g., a color camera or a depth camera) in which individual pixel values are not a multiple of eight bits. In some embodiments, the DMA engine may perform a variety of image processing operations on the pixel data prior to the pixel data being written into the second memory. In one example, the DMA engine may be configured to identify and label one or more pixels as being within a particular range of pixel values and/or the DMA engine may be configured to label pixels as belonging to one or more pixel groups based on their pixel values.
摘要翻译： 描述了在将像素数据从第一存储器（例如，DRAM）到第二存储器（例如，本地高速缓存）的数据传输期间使用直接存储器访问（DMA）引擎预处理像素数据的方法。 像素数据可以从其中各个像素值不是8位的倍数的图像捕获设备（例如，彩色照相机或深度相机）导出。 在一些实施例中，DMA引擎可以在将像素数据写入第二存储器之前对像素数据执行各种图像处理操作。 在一个示例中，DMA引擎可以被配置为将一个或多个像素识别并标记为在像素值的特定范围内，和/或DMA引擎可以被配置为基于它们的像素组将像素标记为属于一个或多个像素组 像素值。
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公开(公告)号：US20160180494A1
公开(公告)日：2016-06-23
申请号：US14574100
申请日：2014-12-17
CPC分类号： G06T1/60 , G06T1/20 , G06T7/90 , G06T2207/10024 , G06T2207/10028
摘要： Methods for preprocessing pixel data using a Direct Memory Access (DMA) engine during a data transfer of the pixel data from a first memory (e.g., a DRAM) to a second memory (e.g., an SRAM) are described. The pixel data may derive from a color camera or a depth camera in which individual pixel values are not a multiple of eight bits. In some cases, the DMA engine may perform a variety of image processing operations on the pixel data prior to the pixel data being written into the second memory. In one embodiment, the DMA engine may be configured to determine whether one or more pixels corresponding with the pixel data may be invalidated or skipped based on a minimum pixel value threshold and a maximum pixel value threshold and to embed pixel skipping information within unused bits of the pixel data.
摘要翻译： 描述了在从第一存储器（例如，DRAM）到第二存储器（例如，SRAM）的像素数据的数据传输期间使用直接存储器访问（DMA）引擎来预处理像素数据的方法。 像素数据可以从彩色相机或深度相机中得出，其中各个像素值不是8位的倍数。 在某些情况下，DMA引擎可以在将像素数据写入第二存储器之前对像素数据执行各种图像处理操作。 在一个实施例中，DMA引擎可以被配置为基于最小像素值阈值和最大像素值阈值来确定与像素数据相对应的一个或多个像素可能被无效或跳过，并且将像素跳过信息嵌入到未使用的位内 像素数据。
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3.发明申请Processing Unit Incorporating Instruction-Based Persistent Vector Multiplexer Control 失效结合基于指令的持续矢量多路复用器控制的处理单元公开(公告)号：US20090228681A1
公开(公告)日：2009-09-10
申请号：US12045221
申请日：2008-03-10
CPC分类号： G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30123
摘要： Persistent vector multiplexer control is used in a vector-based execution unit to control the shuffling of words in operand vectors processed by the execution unit. In addition, a persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be persisted such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.
摘要翻译： 持续矢量复用器控制在基于矢量的执行单元中用于控制由执行单元处理的操作数向量中的字的混洗。 此外，在用于基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息被持久化，使得由基于向量的执行单元执行的后续向量指令处理的操作数向量将被 使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。
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4.发明授权Processing unit incorporating instruction-based persistent vector multiplexer control 失效包含基于指令的持久矢量多路复用器控制的处理单元公开(公告)号：US07904699B2
公开(公告)日：2011-03-08
申请号：US12045221
申请日：2008-03-10
IPC分类号： G06F9/00
CPC分类号： G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30123
摘要： Persistent vector multiplexer control is used in a vector-based execution unit to control the shuffling of words in operand vectors processed by the execution unit. In addition, a persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be persisted such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.
摘要翻译： 持续矢量复用器控制在基于矢量的执行单元中用于控制由执行单元处理的操作数向量中的字的混洗。 此外，在用于基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息被持久化，使得由基于向量的执行单元执行的后续向量指令处理的操作数向量将被 使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。
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5.发明申请Processing Unit Incorporating Special Purpose Register for Use with Instruction-Based Persistent Vector Multiplexer Control 失效包含专用寄存器的处理单元，用于基于指令的持续矢量复用器控制公开(公告)号：US20090228682A1
公开(公告)日：2009-09-10
申请号：US12045222
申请日：2008-03-10
CPC分类号： G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30123
摘要： A software-accessible special purpose register is architected into a processing unit in order to implement persistent vector multiplexer control of a vector-based execution unit. A persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be stored in the special purpose register such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.
摘要翻译： 软件可访问专用寄存器被设计成处理单元，以便实现基于向量的执行单元的持久矢量多路复用器控制。 在基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息存储在专用寄存器中，使得由基于向量的执行单元执行的后续向量指令处理的操作数向量 将使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。
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6.发明授权Processing unit incorporating special purpose register for use with instruction-based persistent vector multiplexer control 失效包含专用寄存器的处理单元，用于基于指令的持久矢量多路复用器控制公开(公告)号：US07904700B2
公开(公告)日：2011-03-08
申请号：US12045222
申请日：2008-03-10
IPC分类号： G06F9/00
CPC分类号： G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30123
摘要： A software-accessible special purpose register is architected into a processing unit in order to implement persistent vector multiplexer control of a vector-based execution unit. A persistent swizzle instruction is defined in an instruction set for the vector-based execution unit and is used to cause state information to be stored in the special purpose register such that the operand vectors processed by subsequent vector instructions executed by the vector-based execution unit will be selectively shuffled using the persisted state information. As a result, when multiple vector instructions require a common custom word ordering for one or more operand vectors, a single persistent swizzle instruction may be used to select the desired custom word ordering for all of the vector instructions.
摘要翻译： 软件可访问专用寄存器被设计成处理单元，以便实现基于向量的执行单元的持久矢量多路复用器控制。 在基于向量的执行单元的指令集中定义持续转换指令，并且用于使状态信息存储在专用寄存器中，使得由基于向量的执行单元执行的后续向量指令处理的操作数向量 将使用持久状态信息选择性地进行混洗。 因此，当多个向量指令需要一个或多个操作数向量的公共自定义单词排序时，可以使用单个持续旋转指令来选择所有向量指令的期望的定制单词排序。
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公开(公告)号：US20180211638A1
公开(公告)日：2018-07-26
申请号：US15415569
申请日：2017-01-25
申请人： Tolga Ozguner , Jeffrey Powers Bradford , Miguel Comparan , Gene Leung , Adam James Muff , Ryan Scott Haraden , Christopher Jon Johnson
发明人： Tolga Ozguner , Jeffrey Powers Bradford , Miguel Comparan , Gene Leung , Adam James Muff , Ryan Scott Haraden , Christopher Jon Johnson
CPC分类号： G09G5/395 , G02B27/0103 , G02B27/017 , G02B2027/014 , G02B2027/0178 , G02B2027/0187 , G03H1/0005 , G03H2001/0088 , G06F1/163 , G06F3/011 , G06F12/0207 , G06F12/0862 , G06F12/121 , G06F12/128 , G06F2212/1016 , G06F2212/1028 , G06F2212/1044 , G06F2212/455 , G06F2212/6026 , G06T1/20 , G06T1/60 , G09G3/003 , G09G2360/121 , Y02D10/13
摘要： Systems and methods are disclosed herein for providing improved cache structures and methods that are optimally sized to support a predetermined range of late stage adjustments and in which image data is intelligently read out of DRAM and cached in such a way as to eliminate re-fetching of input image data from DRAM and minimize DRAM bandwidth and power.
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8.发明授权公开(公告)号：US08255674B2
公开(公告)日：2012-08-28
申请号：US12360975
申请日：2009-01-28
IPC分类号： G06F9/312
CPC分类号： G06F9/30145 , G06F9/30123 , G06F9/30181 , G06F9/3824 , G06F9/3838 , G06F9/3851
摘要： A logic arrangement and method to support implied storage operation decode uses redundant target address detection, whereby target addresses of previous instructions are compared with the target address of the current instruction, and if equal, and the target addresses of previous instructions are not used as sources, the current instruction is decoded as a store instruction. This allows a redundant operation in an instruction set architecture to be redefined as a store instruction, freeing up opcodes normally used for store instructions to be used for other instructions.
摘要翻译： 支持隐含存储操作解码的逻辑布置和方法使用冗余目标地址检测，由此将先前指令的目标地址与当前指令的目标地址进行比较，如果相等，并且先前指令的目标地址不被用作源 ，当前指令被解码为存储指令。 这允许将指令集架构中的冗余操作重新定义为存储指令，释放通常用于存储指令的操作码以用于其他指令。
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公开(公告)号：US08217953B2
公开(公告)日：2012-07-10
申请号：US12110045
申请日：2008-04-25
IPC分类号： G09G5/00
CPC分类号： G06T15/04 , G06T2200/12
摘要： A circuit arrangement and method utilize texture data prefetching to prefetch texture data used by an anisotropic filtering algorithm. In particular, stride-based prefetching may be used to prefetch texture data for use in anisotropic filtering, where the value of the stride, or difference between successive accesses, is based upon a distance in a memory address space between sample points taken along the line of anisotropy used in an anisotropic filtering algorithm.
摘要翻译： 电路布置和方法利用纹理数据预取来预取由各向异性滤波算法使用的纹理数据。 特别地，可以使用基于步幅的预取来预取用于各向异性过滤中的纹理数据，其中步幅的值或连续访问之间的差是基于沿着线所取的采样点之间的存储器地址空间中的距离 在各向异性过滤算法中使用各向异性。
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公开(公告)号：US07945764B2
公开(公告)日：2011-05-17
申请号：US11972746
申请日：2008-01-11
IPC分类号： G06F9/30
CPC分类号： G06F9/3869 , G06F1/3203 , G06F1/324 , G06F9/3836 , G06F9/3838 , G06F9/3851 , G06F9/3885 , Y02D10/126
摘要： A multirate execution unit is capable of being operated in a plurality of modes, with the execution unit being capable of clocked at multiple different rates relative to a multithreaded issue unit such that, in applications where maximum performance is desired, the execution unit can be clocked at a rate that is faster than the clock rate for the multithreaded issue unit, and in applications where a lower power profile is desired, the execution unit can be throttled back to a slower rate to reduce the power consumption of the execution unit. When the execution unit is clocked at a faster rate than the multithreaded issue unit, the issue unit is permitted to issue more instructions per cycle than when the execution unit is throttled to the slower rate to increase overall instruction throughput.
摘要翻译： 多速率执行单元能够以多种模式操作，其中执行单元能够以相对于多线程发布单元的多个不同速率进行计时，使得在需要最大性能的应用中，执行单元可被计时 以比多线程发布单元的时钟速率快的速率，以及在需要较低功率配置的应用中，执行单元可以被限制回到较慢的速率以降低执行单元的功耗。 当执行单元以比多线程发布单元更快的速度进行计时时，允许发布单元每循环发出更多指令，而不是执行单元被限制到较慢的速率以增加总体指令吞吐量。
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