公开(公告)号：US20080203404A1

公开(公告)日：2008-08-28

申请号：US12023177

申请日：2008-01-31

申请人： Ryu Washino ,  Susumu Sorimachi ,  Daisuke Nakai ,  Kaoru Okamoto ,  Shigenori Hayakawa

发明人： Ryu Washino ,  Susumu Sorimachi ,  Daisuke Nakai ,  Kaoru Okamoto ,  Shigenori Hayakawa

IPC分类号： H01L33/00 ,  H01L31/00

CPC分类号： H01S5/0425 ,  H01L31/0224 ,  H01S5/22

摘要： In an optical semiconductor device that emits or receives light substantially perpendicularly to or in parallel to an active surface formed on a semiconductor substrate, the optical semiconductor device, an electrode that is formed on the active surface side and connected to the active surface is stepped or tapered at an end of the electrode. The electrode of the optical semiconductor device is formed of three layers including an adhesive layer, a diffusion prevention layer, and an Au layer, and the stepped configuration or the taped configuration is formed by a difference of the thickness of the Au layer or the thickness of the adhesive layer/diffusion prevention layer/Au layer.

摘要翻译： 在发射或接收与形成在半导体衬底上的有源表面基本垂直或平行的光的光学半导体器件中，光学半导体器件，形成在有源表面侧并连接到有源表面的电极是阶梯形或 在电极端部呈锥形。 光半导体器件的电极由包括粘合剂层，扩散防止层和Au层的三层形成，并且通过Au层的厚度或厚度的差异来形成台阶状或带状构造 的粘合层/扩散防止层/ Au层。

公开(公告)号：US07687295B2

公开(公告)日：2010-03-30

申请号：US12023177

申请日：2008-01-31

申请人： Ryu Washino ,  Susumu Sorimachi ,  Daisuke Nakai ,  Kaoru Okamoto ,  Shigenori Hayakawa

发明人： Ryu Washino ,  Susumu Sorimachi ,  Daisuke Nakai ,  Kaoru Okamoto ,  Shigenori Hayakawa

IPC分类号： H01L21/00 ,  H01L29/26

CPC分类号： H01S5/0425 ,  H01L31/0224 ,  H01S5/22

摘要： In an optical semiconductor device that emits or receives light substantially perpendicularly to or in parallel to an active surface formed on a semiconductor substrate, the optical semiconductor device, an electrode that is formed on the active surface side and connected to the active surface is stepped or tapered at an end of the electrode. The electrode of the optical semiconductor device is formed of three layers including an adhesive layer, a diffusion prevention layer, and an Au layer, and the stepped configuration or the taped configuration is formed by a difference of the thickness of the Au layer or the thickness of the adhesive layer/diffusion prevention layer/Au layer.

摘要翻译： 在发射或接收与形成在半导体衬底上的有源表面基本垂直或平行的光的光学半导体器件中，光学半导体器件，形成在有源表面侧并连接到有源表面的电极是阶梯形或 在电极端部呈锥形。 光半导体器件的电极由包括粘合剂层，扩散防止层和Au层的三层形成，并且通过Au层的厚度或厚度的差异来形成台阶状或带状构造 的粘合层/扩散防止层/ Au层。

公开(公告)号：US07687874B2

公开(公告)日：2010-03-30

申请号：US11702203

申请日：2007-02-05

申请人： Kazuhiro Komatsu ,  Yasushi Sakuma ,  Daisuke Nakai ,  Kaoru Okamoto ,  Ryu Washino

发明人： Kazuhiro Komatsu ,  Yasushi Sakuma ,  Daisuke Nakai ,  Kaoru Okamoto ,  Ryu Washino

IPC分类号： H01L31/105 ,  H01L29/868

CPC分类号： H01L31/075 ,  H01L31/022408 ,  Y02E10/548

摘要： In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near the substrate. In a p-i-n multilayer structure, a portion corresponding to a light receiving section of a heavily doped layer on a side near a substrate is previously made thinner than the periphery of the light receiving section by an etching or selective growth technique, over which an absorbing layer and another heavily doped layer are grown to form the light receiving section of mesa structure. This makes it possible to form a good ohmic contact and to realize a PIN-PD with excellent high frequency response characteristics.

摘要翻译： 在使用重掺杂半导体材料形成的台面型PIN-PD中，当入射到光接收部分中的光透射通过吸收层并到达重掺杂层时，在重掺杂层中出现慢载流子时，高频响应降低 靠近基板的一侧。 在pin多层结构中，通过蚀刻或选择性生长技术，预先使与基底附近一侧的重掺杂层的光接收部分对应的部分比光接收部分的周边薄， 并且生长另一重掺杂层以形成台面结构的光接收部分。 这使得可以形成良好的欧姆接触并实现具有优异的高频响应特性的PIN-PD。

公开(公告)号：US20080006895A1

公开(公告)日：2008-01-10

申请号：US11702203

申请日：2007-02-05

申请人： Kazuhiro Komatsu ,  Yasushi Sakuma ,  Daisuke Nakai ,  Kaoru Okamoto ,  Ryu Washino

发明人： Kazuhiro Komatsu ,  Yasushi Sakuma ,  Daisuke Nakai ,  Kaoru Okamoto ,  Ryu Washino

IPC分类号： H01L31/075

CPC分类号： H01L31/075 ,  H01L31/022408 ,  Y02E10/548

摘要： In a mesa type PIN-PD formed using a heavily doped semiconductor material, a high frequency response is degraded as slow carriers occur in a heavily doped layer when light incident into a light receiving section transmits through an absorbing layer and reaches the heavily doped layer on a side near the substrate. In a p-i-n multilayer structure, a portion corresponding to a light receiving section of a heavily doped layer on a side near a substrate is previously made thinner than the periphery of the light receiving section by an etching or selective growth technique, over which an absorbing layer and another heavily doped layer are grown to form the light receiving section of mesa structure. This makes it possible to form a good ohmic contact and to realize a PIN-PD with excellent high frequency response characteristics.

摘要翻译： 在使用重掺杂半导体材料形成的台面型PIN-PD中，当入射到光接收部分中的光透射通过吸收层并到达重掺杂层时，在重掺杂层中出现慢载流子时，高频响应降低 靠近基板的一侧。 在pin多层结构中，通过蚀刻或选择性生长技术，预先使与基底附近一侧的重掺杂层的光接收部分对应的部分比光接收部分的周边薄， 并且生长另一重掺杂层以形成台面结构的光接收部分。 这使得可以形成良好的欧姆接触并实现具有优异的高频响应特性的PIN-PD。

公开(公告)号：US07855093B2

公开(公告)日：2010-12-21

申请号：US12572720

申请日：2009-10-02

申请人： Kaoru Okamoto ,  Ryu Washino ,  Kazuhiro Komatsu ,  Yasushi Sakuma

发明人： Kaoru Okamoto ,  Ryu Washino ,  Kazuhiro Komatsu ,  Yasushi Sakuma

IPC分类号： H01L21/30

CPC分类号： H01S5/12 ,  B82Y20/00 ,  H01S5/1231 ,  H01S5/125 ,  H01S5/34306 ,  H01S5/34313

摘要： A method of manufacturing semiconductor laser device capable of reducing κL, with manufacturing restrictions satisfied, is provided. In a distributed-feedback or distributed-reflective semiconductor laser device, immediately before burying regrowth of a diffraction grating, halogen-based gas is introduced to a reactor, and etching is performed on the diffraction grating so that each side wall has at least two or more crystal faces and a ratio of length of an upper side in a waveguide direction to a bottom side parallel to a (100) surface is 0 to 0.3. And, a reactive product formed on side surfaces of the diffraction grating and in trench portions between stripes of the diffraction grating at an increase of temperature for regrowth is removed. Therefore, the diffraction grating with reduced height and a sine wave shape is obtained, thereby κL of the device is reduced. Thus, an oscillation threshold and optical output efficiency can be improved.

摘要翻译： 提供了一种制造半导体激光器件的方法，该半导体激光器装置能够在制造限制满足的情况下降低L。 在分布反馈或分布反射半导体激光器件中，在埋入衍射光栅的再生长之前，将卤素基气体引入反应器，并在衍射光栅上进行蚀刻，使得每个侧壁具有至少两个或 更多的晶面和波导方向的上侧与平行于（100）面的底面的长度的比率为0〜0.3。 并且，在再生长温度升高时，衍射光栅的侧面和衍射光栅的条纹之间的沟槽部分中形成的反应产物被去除。 因此，获得具有降低的高度和正弦波形的衍射光栅，从而减小了器件的衰减。 因此，可以提高振荡阈值和光输出效率。

公开(公告)号：US20070126119A1

公开(公告)日：2007-06-07

申请号：US11454832

申请日：2006-06-19

申请人： Ryu Washino ,  Takeshi Kikawa ,  Yasushi Sakuma ,  Kaoru Okamoto

发明人： Ryu Washino ,  Takeshi Kikawa ,  Yasushi Sakuma ,  Kaoru Okamoto

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01S5/028 ,  H01L24/02 ,  H01L33/16 ,  H01L2224/04042 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/0102 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H01S5/0281 ,  H01S5/0283 ,  H01S5/0425 ,  H01S5/2027

摘要： An object of the present invention is to provide a semiconductor production technology capable of preventing the peeling of the electrode which occurs in die bonding or wire bonding. There is provided a semiconductor element having an electrode in a surface or in a rear face of a semiconductor substrate, the semiconductor element having a structure in which an amorphous silicon layer 106 is inserted in between an electrode 107 and a semiconductor substrate 101, wherein hydrogen is not added to the amorphous silicon layer 106. Furthermore, an amorphous silicon layer 104 is inserted also in the interface between an electrode 105 and an insulating layer 103, and in the interface between the insulating layer and the semiconductor substrate. Moreover, the present invention is equally applicable to a semiconductor laser having an insulating layer, which serves as a reflective layer, in an oscillating surface side of light, and insulating layers, which serve as a multilayer reflective layer, in a non-oscillating surface side.

摘要翻译： 本发明的目的是提供能够防止在芯片接合或引线接合中发生的电极的剥离的半导体制造技术。 提供了在半导体衬底的表面或背面具有电极的半导体元件，该半导体元件具有非晶硅层106插入在电极107和半导体衬底101之间的结构，其中氢 不添加到非晶硅层106。 此外，非晶硅层104也插入在电极105和绝缘层103之间的界面中，以及绝缘层和半导体衬底之间的界面中。 此外，本发明同样可应用于在非振荡表面中具有在光的振荡表面侧中用作反射层的绝缘层和用作多层反射层的绝缘层的半导体激光器 侧。

公开(公告)号：US20080013582A1

公开(公告)日：2008-01-17

申请号：US11708135

申请日：2007-02-20

申请人： Kaoru Okamoto ,  Ryu Washino ,  Kazuhiro Komatsu ,  Yasushi Sakuma

发明人： Kaoru Okamoto ,  Ryu Washino ,  Kazuhiro Komatsu ,  Yasushi Sakuma

IPC分类号： H01S5/026 ,  H01L33/00

CPC分类号： H01S5/12 ,  B82Y20/00 ,  H01S5/1231 ,  H01S5/125 ,  H01S5/34306 ,  H01S5/34313

摘要： A method of manufacturing semiconductor laser device capable of reducing κL, with manufacturing restrictions satisfied, is provided. In a distributed-feedback or distributed-reflective semiconductor laser device, immediately before burying regrowth of a diffraction grating, halogen-based gas is introduced to a reactor, and etching is performed on the diffraction grating so that each side wall has at least two or more crystal faces and a ratio of length of an upper side in a waveguide direction to a bottom side parallel to a (100) surface is 0 to 0.3. And, a reactive product formed on side surfaces of the diffraction grating and in trench portions between stripes of the diffraction grating at an increase of temperature for regrowth is removed. Therefore, the diffraction grating with reduced height and a sine wave shape is obtained, thereby κL of the device is reduced. Thus, an oscillation threshold and optical output efficiency can be improved.

摘要翻译： 提供了一种制造能够减少kappa的半导体激光装置的方法，其制造限制被满足。 在分布反馈或分布反射半导体激光器件中，在埋入衍射光栅的再生长之前，将卤素基气体引入反应器，并在衍射光栅上进行蚀刻，使得每个侧壁具有至少两个或 更多的晶面和波导方向的上侧与平行于（100）面的底面的长度的比率为0〜0.3。 并且，在再生长温度升高时，衍射光栅的侧面和衍射光栅的条纹之间的沟槽部分中形成的反应产物被去除。 因此，获得具有降低的高度和正弦波形的衍射光栅，从而减小了器件的κ。 因此，可以提高振荡阈值和光输出效率。

公开(公告)号：US20060222032A1

公开(公告)日：2006-10-05

申请号：US11215122

申请日：2005-08-31

申请人： Yasushi Sakuma ,  Katsuya Motoda ,  Kaoru Okamoto ,  Ryu Washino

发明人： Yasushi Sakuma ,  Katsuya Motoda ,  Kaoru Okamoto ,  Ryu Washino

IPC分类号： H01S5/00

CPC分类号： H01S5/12 ,  H01S5/227 ,  H01S5/30

摘要： An InGaAsP thin film layer having the same index of refraction as a diffraction grating is inserted between a p-type InP clad layer and the diffraction grating composed of an InGaAsP layer. In this structure, the InGaAsP layer is present over an active layer, and the amount of thermal diffusion of dopant to the vicinity of the active layer does not depend on an aperture width or the presence or absence of the diffraction grating when the p-type InP clad layer is grown, thereby obtaining a stable optical output, a threshold current, and slope efficiency.

摘要翻译： 将具有与衍射光栅相同折射率的InGaAsP薄膜层插入p型InP包层和由InGaAsP层构成的衍射光栅之间。 在该结构中，InGaAsP层存在于有源层上，并且掺杂剂到有源层附近的热扩散量不依赖于孔径宽度或衍射光栅的存在或不存在，当p型 生长InP覆层，从而获得稳定的光输出，阈值电流和斜率效率。

公开(公告)号：US20050286828A1

公开(公告)日：2005-12-29

申请号：US11031003

申请日：2005-01-10

申请人： Yasushi Sakuma ,  Katsuya Motoda ,  Kenji Uchida ,  Ryu Washino

发明人： Yasushi Sakuma ,  Katsuya Motoda ,  Kenji Uchida ,  Ryu Washino

IPC分类号： G02B6/12 ,  G02B6/136 ,  H01L21/3065 ,  H01L31/10 ,  H01S5/223

CPC分类号： G02B6/136 ,  G02B2006/12097

摘要： In a dry etching step for an organic material film, a fluorine-containing member is disposed to the periphery of a semiconductor substrate disposed on a lower electrode or a tray for wafer transportation to form fluorine (fluoro-radicals) from the member per se in addition to the fluoric gas added to the etching gas, with a purpose of removing reaction products, thereby removing reaction products deposited on the semiconductor substrate efficiently and stably.

摘要翻译： 在有机材料膜的干式蚀刻工序中，在设置在下部电极或用于晶片输送的托盘上的半导体基板的周围配置含氟部件，从该部件本身形成氟（氟自由基） 除了添加到蚀刻气体中的氟气外，还具有去除反应产物的目的，从而有效且稳定地除去沉积在半导体衬底上的反应产物。

公开(公告)号：US20050250334A1

公开(公告)日：2005-11-10

申请号：US11028295

申请日：2005-01-04

申请人： Ryu Washino ,  Yasushi Sakuma ,  Masaru Mukaikubo ,  Hura Harpreet Singh ,  Kenji Uchida

发明人： Ryu Washino ,  Yasushi Sakuma ,  Masaru Mukaikubo ,  Hura Harpreet Singh ,  Kenji Uchida

IPC分类号： B24B5/00 ,  B24B29/02 ,  B24B37/30 ,  H01L21/302 ,  H01L21/304 ,  H01L21/32 ,  H01L21/461 ,  H01L21/68

CPC分类号： B24B37/30

摘要： During the polishing of a semiconductor substrate, the semiconductor wafer that has been reduced in thickness, and hence in strength, by polishing, suffers outer-surface damage (or cracking) due to the initial damage caused by the use of polishing quartz. In order to solve these problems, the present invention applies a semiconductor substrate fixing jig formed with, on the face for fixing the semiconductor substrate, a groove(s) of almost the same diameter as that of the semiconductor substrate. Semiconductor substrate damage and cracking can be suppressed by applying this jig.

摘要翻译： 在半导体衬底的研磨过程中，由于使用抛光石英引起的初始损伤，已经减小了厚度，因此通过抛光强度的半导体晶片受到外表面损伤（或开裂）。 为了解决这些问题，本发明应用半导体衬底固定夹具，其在用于固定半导体衬底的表面上形成有与半导体衬底的直径几乎相同的沟槽。 通过施加该夹具可以抑制半导体衬底的损伤和破裂。