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公开(公告)号:US12039914B2
公开(公告)日:2024-07-16
申请号:US17979064
申请日:2022-11-02
发明人: Kye Uk Lee , Jung Hwan Hwang , Hyun Joon Kim
IPC分类号: G09G3/32 , H01L25/075 , H01L27/12 , H01L33/62
CPC分类号: G09G3/32 , H01L25/0753 , H01L27/1244 , H01L33/62 , G09G2300/0408 , G09G2300/0413 , G09G2300/0426 , G09G2300/0819 , G09G2300/0852 , G09G2300/0861 , G09G2300/0871 , G09G2310/0202 , G09G2310/0272 , G09G2320/02 , G09G2320/064 , G09G2330/02 , G09G2330/12
摘要: A display device includes a substrate including a display area in which a plurality of sub-pixels are disposed, a plurality of anode electrodes respectively connected to the plurality of sub-pixels, and a cathode electrode connected to the plurality of sub-pixels and spaced apart from each of the plurality of anode electrodes. Each of the plurality of anode electrodes is disposed closer to the substrate than the cathode electrode by a height difference compensation part.
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公开(公告)号:US11804172B2
公开(公告)日:2023-10-31
申请号:US17941990
申请日:2022-09-09
发明人: Jung Hwan Hwang , Hyun Joon Kim , Kye Uk Lee , Jun Ki Jeong , Sang Jin Jeon
IPC分类号: G09G3/32
CPC分类号: G09G3/32 , G09G2310/027 , G09G2310/0297
摘要: A display device includes connection lines, pulse amplitude modulation (PAM) data lines configured to receive pulse width modulation (PWM) data voltages, PWM data lines configured to receive the PWM data voltages, a first connection control line configured to receive a first connection control signal, a second connection control line configured to receive a second connection control signal, subpixels connected to the PWM data lines and the PAM data lines, and a first demultiplexer (demux) unit configured to connect the connection lines to the PAM data lines or to the PWM data lines according to the first connection control signal and the second connection control signal.
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公开(公告)号:US11741884B2
公开(公告)日:2023-08-29
申请号:US17323213
申请日:2021-05-18
发明人: Hyun Joon Kim , Jang Mi Kang , Hae Min Kim , Jun Hyun Park , Min Jae Jeong , Ki Hyun Pyo
IPC分类号: G09G3/32 , G09G3/3233 , G09G3/3208 , G09G3/30 , G09G3/3225 , G09G3/325
CPC分类号: G09G3/32 , G09G3/30 , G09G3/325 , G09G3/3208 , G09G3/3225 , G09G3/3233 , G09G2300/0819 , G09G2310/0267 , G09G2320/0233 , G09G2320/045
摘要: A display device according to an embodiment of the present disclosure includes pixels connected to a first scan line, a second scan line, a third scan line, a data line, a first emission control line, and a second emission control line. Each of the pixels includes a light emitting element; a first transistor connected between a first node connected to a first power source and a second electrode connected to a second node connected to an anode of the light emitting element, and including a gate electrode connected to a third node; a second transistor connected between the data line and a fourth node and including a gate electrode connected to the first scan line; a first capacitor connected between the second node and a fifth node; a second capacitor connected between the fourth node and the fifth node; a fourth transistor connected between the third node and the fifth node, and including a gate electrode connected to the second scan line; and a sixth transistor connected between the third node and the fourth node, and including a gate electrode connected to the first emission control line.
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公开(公告)号:US11514834B2
公开(公告)日:2022-11-29
申请号:US17231492
申请日:2021-04-15
IPC分类号: G09G3/20 , G02F1/1333 , F21V8/00
摘要: A tiled display device includes an array of a plurality of display panels. Each of the plurality of display panels includes a plurality of pixels constituting a plurality of pixel rows and a plurality of pixel columns, a data distributor disposed between a first pixel of a first pixel row among the plurality of pixel rows and a second pixel of the first pixel row adjacent to the first pixel in a first direction, and a scan driver disposed between the second pixel and a third pixel adjacent to the second pixel in the first direction.
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公开(公告)号:US11257437B2
公开(公告)日:2022-02-22
申请号:US17092495
申请日:2020-11-09
发明人: Hyun Joon Kim , Jun Ki Jeong
IPC分类号: G09G3/3266
摘要: A pixel of a light-emitting display device includes a capacitor, a first transistor, a second transistor including a gate receiving a gate writing signal, a third transistor including a gate receiving a scan signal, a fourth transistor including a gate receiving a gate initialization signal, a fifth transistor including a gate receiving a first emission signal, a sixth transistor including a gate receiving a second emission signal, and a light-emitting diode. The scan signal and the gate writing signal may be provided at a first frequency, and the first emission signal, the second emission signal and the gate initialization signal may be provided at a second frequency higher than the first frequency.
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公开(公告)号:US10896946B2
公开(公告)日:2021-01-19
申请号:US16398372
申请日:2019-04-30
发明人: Jisu Na , Kwang-Min Kim , Ki Wook Kim , Hyun Joon Kim
摘要: An organic light emitting diode display device includes a substrate, light emitting structures, fan-out wirings, and a wiring structure. The substrate has a display region including a light emitting region and a peripheral region surrounding the light emitting region and a pad region located in one side of the display region. The light emitting structures are disposed in the light emitting region on the substrate. The fan-out wirings are disposed in the peripheral region on the substrate, and the fan-out wirings include a straight-line portion and an oblique line portion. The wiring structure is disposed on the fan-out wirings, and includes a conductive layer and conductive patterns spaced apart from each other and disposed on the conductive layer.
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公开(公告)号:US09685948B2
公开(公告)日:2017-06-20
申请号:US14456926
申请日:2014-08-11
发明人: Jong Hee Kim , Hyun Joon Kim , Kyoung Ju Shin , Alexander Ward , Cheol-Gon Lee , Chong Chul Chai
IPC分类号: G09G3/36 , H03K17/693
CPC分类号: H03K17/693 , G09G3/3677 , G09G2310/0286 , G09G2310/06
摘要: A stage includes a first transistor including an input terminal to which a clock signal is applied and a control terminal connected to a first node; a first capacitor including terminals respectively connected to the first node and an output terminal of the first transistor; a second transistor including an input terminal connected to the output terminal of the first transistor, a control terminal connected to a second node, and an output terminal to which a low voltage is applied; a third transistor including an output terminal connected to the second node, a control terminal connected to the first node, and an input terminal to which the low voltage is applied; and a fourth transistor including an input terminal connected to the first node and an output terminal to which the low voltage is applied, wherein the fourth transistor is switched according to an output signal of a next stage.
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公开(公告)号:US09515647B2
公开(公告)日:2016-12-06
申请号:US14565553
申请日:2014-12-10
发明人: Jae Keun Lim , Hyun Joon Kim , Cheol-Gon Lee , Chong Chul Chai
CPC分类号: H03K17/162 , G09G3/3677 , G09G2300/0426 , G09G2310/0267 , G09G2310/0286 , G09G2310/08
摘要: A gate driver includes a stage including an input unit including a first transistor diode-connected to a first input terminal of the stage through a first node and biased by a first input signal of the first input terminal, an output unit including a second transistor including a gate electrode coupled to the first node, a first electrode coupled to a clock input terminal, and a second electrode coupled to a first output terminal of the stage, a capacitor coupled between the gate electrode and the second electrode of the second transistor, and a noise remover including a third transistor including a gate electrode coupled to a second node, a first electrode coupled to the first node, and a second electrode coupled to a first voltage input terminal of the stage which receives a first voltage.
摘要翻译: 栅极驱动器包括一个输入单元,该输入单元包括第一晶体二极管,第一晶体二极管通过第一节点连接到该级的第一输入端,并被第一输入端的第一输入信号偏置;输出单元,包括第二晶体管,包括 耦合到第一节点的栅电极,耦合到时钟输入端的第一电极和耦合到该级的第一输出端的第二电极,耦合在第二晶体管的栅电极和第二电极之间的电容器,以及 噪声去除器,包括第三晶体管,其包括耦合到第二节点的栅极电极,耦合到第一节点的第一电极和耦合到接收第一电压的级的第一电压输入端子的第二电极。
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公开(公告)号:US20160131951A1
公开(公告)日:2016-05-12
申请号:US14671712
申请日:2015-03-27
发明人: Cheol-Gon LEE , Mee Hye Jung , In-Jae Hwang , Jang Mi Kang , Hyun Joon Kim
IPC分类号: G02F1/1362 , H01L27/12 , G02F1/1343 , G02F1/1368 , G02F1/1333
CPC分类号: G02F1/136213 , G02F1/133345 , G02F1/133377 , G02F1/134309 , G02F1/13624 , G02F1/136286 , G02F1/1368 , G02F2001/134345 , G02F2001/13606 , G02F2001/136222 , H01L27/1255
摘要: A liquid crystal display includes: a gate line extending in a first direction; a first data line and a second data line extending in a second direction; a thin film transistor (TFT) including a gate electrode connected to the gate line, a source electrode connected to the first data line, and a drain electrode; a vertical storage electrode line extending between the first and second data lines; a passivation layer disposed on the TFT and the vertical storage electrode line; an insulating layer disposed on the passivation layer; and a subpixel electrode disposed on the insulating layer, connected to the drain electrode, wherein the vertical storage electrode line includes an expansion, the insulating layer includes an opening exposing a portion of the passivation layer overlapping the expansion, and wherein the subpixel electrode includes a protrusion overlapping the expansion, a reinforced storage capacitor being formed between the protrusion and the expansion.
摘要翻译: 液晶显示器包括:沿第一方向延伸的栅极线; 第一数据线和第二数据线,沿第二方向延伸; 包括连接到栅极线的栅电极,连接到第一数据线的源电极和漏电极的薄膜晶体管(TFT); 在第一和第二数据线之间延伸的垂直存储电极线; 设置在TFT和垂直存储电极线上的钝化层; 设置在所述钝化层上的绝缘层; 和设置在所述绝缘层上的子像素电极,所述子像素电极与所述漏极连接,其中所述垂直存储电极线包括扩展部,所述绝缘层包括暴露所述钝化层的与所述膨胀重叠的部分的开口,并且其中所述子像素电极包括 突起与膨胀重叠,在突起和膨胀之间形成增强的储存电容器。
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公开(公告)号:US12094865B2
公开(公告)日:2024-09-17
申请号:US17841247
申请日:2022-06-15
发明人: Seung Chan Lee , Gun Hee Kim , Sang Ho Park , Ju Won Yoon , Joo Hee Jeon , Hyun Joon Kim
IPC分类号: H01L25/18 , H01L25/00 , H10K59/131 , H10K59/18 , H10K77/10
CPC分类号: H01L25/18 , H01L25/50 , H10K59/131 , H10K59/18 , H10K77/10
摘要: A display device and a method for fabricating the same. The display device includes a substrate including a circuit layer and a first pad unit; an auxiliary substrate disposed below the substrate and comprising a driving circuit and a second pad unit; a light-emitting unit disposed on the circuit layer; and a connection electrode in contact with a side surface of the substrate and electrically connecting the first pad unit with the second pad unit. The method includes forming a circuit layer and a first pad unit on a first surface of a substrate; forming a driving circuit and a second pad unit on a fourth surface of an auxiliary substrate; and attaching a second surface of the substrate opposite the first surface to a third surface of the auxiliary substrate opposite the fourth surface.
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