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    SYSTEM AND METHOD FOR MEMORY BAD BLOCK MANAGEMENT
    1.
    发明申请
    SYSTEM AND METHOD FOR MEMORY BAD BLOCK MANAGEMENT 有权

    公开(公告)号：US20250165155A1

    公开(公告)日：2025-05-22

    申请号：US19025216

    申请日：2025-01-16

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Hyunseok KIM

    IPC: G06F3/06 ,  G06F12/02

    Abstract: A memory system includes a memory module and a memory controller to control semiconductor memory devices in the memory module. Each of the semiconductor memory devices provides the memory controller with an address of at least a defective memory cell row unrepairable with a redundancy resource in a memory cell array as unrepairable address information. The memory controller allocates a portion of a normal cell regions of at least one of the semiconductor memory devices as a reserved region, and remaps first and second unrepairable addresses to first and second physical addresses of the reserved region in response to first and second host physical addresses from a host matching the first and second unrepairable addresses, respectively. The first physical address and the second physical address are consecutive.

    METHOD AND APPARATUS FOR POWER SHARING
    3.
    发明申请
    METHOD AND APPARATUS FOR POWER SHARING 有权
    功率共享的方法和装置

    公开(公告)号：US20150244185A1

    公开(公告)日：2015-08-27

    申请号：US14621782

    申请日：2015-02-13

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Chiseon WON ,  Yongjun YU ,  Jongkyu LEE ,  Siyoul CHOI ,  Hyunseok KIM

    IPC: H02J7/00

    CPC classification number: H02J7/007 ,  G06F1/266 ,  H02J7/008

    Abstract: A method is provided comprising: detecting an electrical connection between a first device having a first battery and a second device having a second battery; receiving an indication of a residual power of the second battery; displaying, by the first device, a power sharing interface based on the indication of the residual power of the second battery; detecting an input to the interface specifying a threshold amount of power; transmitting power from the first battery to the second device until the threshold amount of power is transmitted.

    Abstract translation: 提供了一种方法，包括：检测具有第一电池的第一装置和具有第二电池的第二装置之间的电连接; 接收第二电池的剩余电量的指示; 基于所述第二电池的剩余电力的指示，由所述第一装置显示电力共享接口; 检测指定阈值电量的接口的输入; 从第一电池向第二设备发送功率，直到发送阈值电量为止。

    ELECTRONIC DEVICE AND OPERATION METHOD THEREOF
    4.
    发明申请
    ELECTRONIC DEVICE AND OPERATION METHOD THEREOF 有权

    公开(公告)号：US20250022427A1

    公开(公告)日：2025-01-16

    申请号：US18638320

    申请日：2024-04-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunseok KIM ,  Junghyuk KIM

    IPC: G09G3/34

    Abstract: An electronic device may include: an image input, a display, memory storing instructions, and at least one processor operatively connected to the image input, the memory, and the display. At least one processor may be configured to execute the instructions to receive data regarding a first frame through the image input, generate first screen data regarding timing control and frame rate control of the first frame and store the first screen data in the memory, based on a difference between a first pixel value of the first frame and a pixel value of a frame contiguous to the first frame being equal to or less than a predetermined value, stop generating new screen data for controlling the display, and control the display to display a screen based on the first screen data.

    ELECTRONIC DEVICE FOR MULTI-DISPLAY CONTROL
    6.
    发明公开
    ELECTRONIC DEVICE FOR MULTI-DISPLAY CONTROL 审中-公开

    公开(公告)号：US20230350626A1

    公开(公告)日：2023-11-02

    申请号：US18097874

    申请日：2023-01-17

    Applicant: SAMSUNG ELECTRONICS CO., LTD.

    Inventor： Hyunseok KIM ,  Jeongkee PARK

    IPC: G06F3/14 ,  G09G3/20

    CPC classification number: G06F3/1446 ,  G09G3/2092 ,  G09G2330/026 ,  G09G2360/04

    Abstract: An electronic device is disclosed. The electronic device includes a first communication connector connected to a first external device, a second communication connector connected to a second external device, a processor, and a control circuit electrically connected to the processor, the first communication connector, and the second communication connector, the control circuit including a first path, a second path and a third path. The processor is configured to identify an operating mode of the electronic device, and based on the identified operating mode of the electronic device, select at least one of the first path connecting the first communication connector and the second communication connector, the second path connecting the first communication connector and the processor, and the third path connecting the processor and the second communication connector.

    ELECTRONIC DEVICE HAVING CONNECTION PATH BETWEEN BUCK CONVERTERS
    7.
    发明申请
    ELECTRONIC DEVICE HAVING CONNECTION PATH BETWEEN BUCK CONVERTERS 有权

    公开(公告)号：US20210126994A1

    公开(公告)日：2021-04-29

    申请号：US17074760

    申请日：2020-10-20

    Applicant: Samsung Electronics Co., Ltd.

    Inventor： Junghoon PARK ,  Hyunseok KIM ,  Hoyeong LIM ,  Seunggoo KANG ,  Moonki YEO ,  Seungbo SHIM ,  Yongseung YI ,  Dongil SON

    IPC: H04M1/02 ,  H02M3/158 ,  G06F1/3203 ,  H05K3/30 ,  H01M10/42

    Abstract: According to an embodiment disclosed in the specification, an electronic device comprises a battery disposed inside the electronic device; a printed circuit board (PCB) disposed inside the electronic device; at least one electronic component disposed on the PCB; and a first buck converter having a first end and a second end, wherein the first end is routed to the battery; and a second buck converter having a first end and a second end, wherein the first end is selectively electrically connected to the second end of the first buck converter, and the second end is routed to the at least one electronic component, and wherein the first buck converter and the second buck converter are configured to boost a voltage provided from the battery through an electrical path formed from the battery by the first end of the first buck converter, and the second end of the first buck converter, the first end of the second buck converter and the second end of the second buck converter to the at least one electronic component.

    COMPUTING DEVICE INCLUDING AN INTER-INTEGRATED CIRCUIT (I2C) COMMUNICATION MODULE AND A COMMUNICATION ERROR RECOVERY METHOD THEREOF
    10.
    发明申请
    COMPUTING DEVICE INCLUDING AN INTER-INTEGRATED CIRCUIT (I2C) COMMUNICATION MODULE AND A COMMUNICATION ERROR RECOVERY METHOD THEREOF 审中-公开
    包括内部集成电路（I2C）通信模块和通信错误恢复方法的计算设备

    公开(公告)号：US20160357701A1

    公开(公告)日：2016-12-08

    申请号：US15057456

    申请日：2016-03-01

    Applicant: SAMSUNG ELECTRONICS CO., LTD

    Inventor： Chul-Woo LEE ,  Hyunseok KIM ,  Sungjin MOON ,  Gyucheol HAN

    IPC: G06F13/42 ,  G06F1/24

    CPC classification number: G06F13/4282 ,  G06F1/24 ,  G06F11/0745 ,  G06F11/0757 ,  G06F11/0793 ,  G06F2213/0016

    Abstract: A computing device includes an inter-integrated circuit (I2C) module configured to perform I2C communication with an external device through a system management bus, a packet generator module configured to transmit a packet to the I2C module through the system management bus, and an I2C controller configured to control operations of the I2C module and the packet generator module. When the I2C module transmits a packet receiving signal to the I2C controller and the I2C controller does not receive the packet receiving signal for a set period of time, the I2C controller may reset the I2C module.

    Abstract translation: 计算设备包括被配置为通过系统管理总线与外部设备执行I2C通信的集成内电路（I2C）模块，配置成通过系统管理总线向I2C模块发送分组的分组生成器模块，以及I2C 控制器配置为控制I2C模块和数据包发生器模块的操作。 当I2C模块向I2C控制器发送数据包接收信号，并且I2C控制器在一段时间内未接收到数据包接收信号时，I2C控制器可能会重置I2C模块。

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