公开(公告)号：US20220139912A1

公开(公告)日：2022-05-05

申请号：US17577549

申请日：2022-01-18

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Yong KWON ,  Byoung-Gi KIM ,  Ki Hwan LEE ,  Jung Han LEE

IPC: H01L27/088 ,  H01L21/8234 ,  H01L29/78 ,  H01L29/66

Abstract: A semiconductor device includes a substrate having first and second regions, first fin groups spaced along a first direction on the first region, each of the first fin groups including adjacent first and second fins having longitudinal directions in a second direction intersecting the first direction, and third to fifth fins spaced along a third direction on the second region, the third to fifth fins having longitudinal directions in a fourth direction intersecting the third direction. The third through fifth fins are at a first pitch, the first and second fins are at a second pitch equal to or smaller than the first pitch, each of the first fin groups is at a first group pitch greater than three times the first pitch and smaller than four times the first pitch, and a width of the first and second fins is same as width of the third fin.

公开(公告)号：US20180130890A1

公开(公告)日：2018-05-10

申请号：US15596152

申请日：2017-05-16

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Han LEE ,  Myung Il KANG ,  Jae Hwan LEE ,  Sun Wook KIM ,  Seong Ju KIM ,  Sung Jin PARK ,  Hong Seon YANG ,  Joo Hee JUNG

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/49

CPC classification number: H01L29/4236 ,  H01L29/4966 ,  H01L29/6656 ,  H01L29/66795 ,  H01L29/7855

Abstract: A semiconductor device including a first fin protruding on a substrate and extending in a first direction; a first gate electrode on the first fin, the first gate electrode intersecting the first fin; a first trench formed within the first fin at a side of the first gate electrode; a first epitaxial layer filling a portion of the first trench, wherein a thickness of the first epitaxial layer becomes thinner closer to a sidewall of the first trench; and a second epitaxial layer filling the first trench on the first epitaxial layer, wherein a boron concentration of the second epitaxial layer is greater than a boron concentration of the first epitaxial layer.

公开(公告)号：US20240120393A1

公开(公告)日：2024-04-11

申请号：US18334849

申请日：2023-06-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jisoo PARK ,  Myung Il KANG ,  Ji Wook KWON ,  Jung Han LEE ,  Subin CHOI

IPC: H01L29/417 ,  H01L23/48 ,  H01L29/06 ,  H01L29/423 ,  H01L29/775 ,  H01L29/786

CPC classification number: H01L29/41733 ,  H01L23/481 ,  H01L29/0673 ,  H01L29/42392 ,  H01L29/775 ,  H01L29/78696

Abstract: A semiconductor device includes a substrate, a first sheet pattern on the substrate, a gate electrode on the substrate and surrounding the first sheet pattern, a first source/drain pattern and a second source/drain pattern respectively connected to a first end and a second end of the first sheet pattern, a contact blocking pattern on a lower side of the second source/drain pattern, a first source/drain contact extending in a first direction and connected to the first source/drain pattern, and a second source/drain contact connected to the second source/drain pattern and extending in the first direction to contact an upper surface of the contact blocking pattern. A depth from an upper surface of the gate electrode to a lowermost portion of the first source/drain contact may be greater than a depth from the upper surface of the gate electrode to the upper surface of the contact blocking pattern.

公开(公告)号：US20190206867A1

公开(公告)日：2019-07-04

申请号：US16030224

申请日：2018-07-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jung Han LEE ,  Sungchul Park ,  Yunil Lee ,  Byoung-gi Kim ,  Yeongmin Jeon ,  Daewon Ha ,  Inchan Hwang ,  Jae Hyun Park ,  Woocheol Shin

IPC: H01L27/092 ,  H01L29/423 ,  H01L27/02 ,  H01L29/08 ,  H01L21/8238 ,  H01L21/306 ,  H01L29/66 ,  H01L21/3213 ,  H01L21/02 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L27/0924 ,  H01L21/02529 ,  H01L21/02532 ,  H01L21/02636 ,  H01L21/30604 ,  H01L21/32139 ,  H01L21/823814 ,  H01L21/823821 ,  H01L21/823828 ,  H01L21/823864 ,  H01L21/823878 ,  H01L27/0207 ,  H01L29/0847 ,  H01L29/165 ,  H01L29/42372 ,  H01L29/6653 ,  H01L29/66545 ,  H01L29/66636 ,  H01L29/7848

Abstract: A semiconductor substrate includes a plurality of gate electrodes crossing active patterns on a substrate and extending in a second direction, the gate electrodes spaced apart in the second direction from each other, a gate separation pattern having a major axis in the first direction and between two of the gate electrodes, the two of the gate electrodes adjacent to each other in the second direction, and a plurality of gate spacers covering sidewalls of respective ones of the gate electrodes, the gate spacers crossing the gate separation pattern and extending in the second direction. The gate separation pattern includes a lower portion extending in the first direction, an intermediate portion protruding from the lower portion and having a first width, and an upper portion between two adjacent gate spacers and protruding from the intermediate portion, the upper portion having a second width less than the first width.

公开(公告)号：US20190051728A1

公开(公告)日：2019-02-14

申请号：US16156062

申请日：2018-10-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jung Han LEE ,  Myung Il KANG ,  Jae Hwan LEE ,  Sun Wook KIM ,  Seong Ju KIM ,  Sung Jin PARK ,  Hong Seon YANG ,  Joo Hee JUNG

IPC: H01L29/423 ,  H01L29/78 ,  H01L29/66 ,  H01L29/49

Abstract: A semiconductor device including a first fin protruding on a substrate and extending in a first direction; a first gate electrode on the first fin, the first gate electrode intersecting the first fin; a first trench formed within the first fin at a side of the first gate electrode; a first epitaxial layer filling a portion of the first trench, wherein a thickness of the first epitaxial layer becomes thinner closer to a sidewall of the first trench; and a second epitaxial layer filling the first trench on the first epitaxial layer, wherein a boron concentration of the second epitaxial layer is greater than a boron concentration of the first epitaxial layer.

公开(公告)号：US20160329327A1

公开(公告)日：2016-11-10

申请号：US14992683

申请日：2016-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jae Hwan LEE ,  Tae Yong KWON ,  Sang Su KIM ,  Chang Jae YANG ,  Jung Han LEE ,  Hwan Wook CHOI ,  Yeon Cheol HEO ,  Sang Hyuk HONG

IPC: H01L27/088 ,  H01L29/06 ,  H01L29/161 ,  H01L29/78 ,  H01L29/10

CPC classification number: H01L27/0886 ,  H01L21/823807 ,  H01L21/823821 ,  H01L27/0924 ,  H01L29/0649 ,  H01L29/1054 ,  H01L29/161 ,  H01L29/165 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7849

Abstract: Semiconductor devices are provided. The semiconductor devices include active fins including a buffer layer disposed on a substrate and a channel layer disposed on the buffer layer and having a first second lattice constant higher than a lattice constant of the buffer layer, a gate structure covering the channel layer and intersecting the active fins, sidewall spacers disposed on both sidewalls of the gate structure, and capping layers disposed to contact lower surfaces of the sidewall spacers and having a width substantially the same as a width of the lower surfaces of the sidewall spacers.

Abstract translation: 提供半导体器件。 半导体器件包括活性鳍片，其包括设置在衬底上的缓冲层和设置在缓冲层上并具有高于缓冲层的晶格常数的第一晶格常数的沟道层，栅极结构覆盖沟道层并与 设置在栅极结构的两个侧壁上的活动翅片，侧壁间隔物以及设置成接触侧壁间隔物的下表面并具有与侧壁间隔物的下表面的宽度基本相同的宽度的封盖层。