公开(公告)号：US20240015948A1

公开(公告)日：2024-01-11

申请号：US18333084

申请日：2023-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Jongyeong MIN ,  Jiye BAEK ,  Yeseul LEE ,  Jinwook LEE ,  Changhwa JUNG

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/0335 ,  H10B12/34

Abstract: A method of manufacturing an integrated circuit device may include forming a plurality of lower electrodes above a substrate, forming a supporter configured to support the plurality of lower electrodes, forming a dielectric film on the plurality of lower electrodes and the supporter, and forming an upper electrode on the dielectric film. The dielectric film may include a lower leakage current prevention layer on an outer surface of each of the plurality of lower electrodes and an outer surface of the supporter, a first capacitor material layer on the lower leakage current prevention layer, an upper material layer on the first capacitor material layer, and a second capacitor material layer on the upper material layer.

公开(公告)号：US20200091278A1

公开(公告)日：2020-03-19

申请号：US16392097

申请日：2019-04-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyooho JUNG ,  Sangyeol KANG ,  Kyuho CHO ,  Eunsun KIM ,  Hyosik MUN

IPC: H01L49/02

Abstract: A method of manufacturing a semiconductor device includes forming a first electrode, forming a preliminary dielectric layer on the first electrode, forming a second electrode on the preliminary dielectric layer, and at least partially phase-changing the preliminary dielectric layer to form a dielectric layer. An interfacial energy between the first electrode and the dielectric layer may be less than an interfacial energy between the first electrode and the preliminary dielectric layer.

公开(公告)号：US20220293719A1

公开(公告)日：2022-09-15

申请号：US17749702

申请日：2022-05-20

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonggyu SONG ,  Kyooho JUNG ,  Younsoo KIM ,  Haeryong KIM ,  Jooho LEE

IPC: H01L49/02 ,  H01L21/285 ,  H01L27/108

Abstract: A capacitor includes: a lower electrode including a metal nitride represented by MM′N, wherein M is a metal element, M′ is an element different from M, and N is nitrogen; a dielectric layer on the lower electrode; an interfacial layer between the lower electrode and the dielectric layer and including a metal nitrate represented by MM′ON, wherein M is a metal element, M′ is an element different from M, N is nitrogen, and O is oxygen; and an upper electrode on the dielectric layer.

公开(公告)号：US20220123103A1

公开(公告)日：2022-04-21

申请号：US17563416

申请日：2021-12-28

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyooho JUNG ,  Jeonggyu SONG ,  Younsoo KIM ,  Jooho LEE

IPC: H01L49/02 ,  H01L21/285 ,  H01L27/108

Abstract: An integrated circuit device includes a lower electrode including a niobium (Nb)-containing layer doped with titanium (Ti), a dielectric layer on the lower electrode, and an upper electrode that covers the dielectric layer.

公开(公告)号：US20210028010A1

公开(公告)日：2021-01-28

申请号：US16791189

申请日：2020-02-14

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younsoo KIM ,  Haeryong KIM ,  Seungmin RYU ,  Sunmin MOON ,  Jeonggyu SONG ,  Changsu WOO ,  Kyooho JUNG ,  Younjoung CHO

IPC: H01L21/02

Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.

公开(公告)号：US20240015946A1

公开(公告)日：2024-01-11

申请号：US18348864

申请日：2023-07-07

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Wonsik CHOI

IPC: H10B12/00

CPC classification number: H10B12/03 ,  H10B12/315 ,  H10B12/482 ,  H01L28/91

Abstract: A method of manufacturing an integrated circuit device includes forming a plurality of lower electrodes above a substrate, forming a dielectric film on the plurality of lower electrodes, forming a doped upper interface film on the dielectric film, and forming an upper electrode on the doped upper interface film, wherein the doped upper interface film includes a dopant, and the dopant includes one selected from tin (Sn), molybdenum (Mo), niobium (Nb), tantalum (Ta), and aluminum (Al).

公开(公告)号：US20210343524A1

公开(公告)日：2021-11-04

申请号：US17376403

申请日：2021-07-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Younsoo KIM ,  Haeryong KIM ,  Seungmin RYU ,  Sunmin MOON ,  Jeonggyu SONG ,  Changsu WOO ,  Kyooho JUNG ,  Younjoung CHO

IPC: H01L21/02

Abstract: A method of forming an oxide film including two non-oxygen elements includes providing a first source material on a substrate, the first source material including a first central element, providing an electron donor compound to be bonded to the first source material, providing a second source material on the substrate after the providing of the electron donor compound, the second source material including a second central element, and providing an oxidant on the substrate.

公开(公告)号：US20210043445A1

公开(公告)日：2021-02-11

申请号：US17071310

申请日：2020-10-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeonggyu SONG ,  Kyooho JUNG ,  Yongsung KIM ,  Jeongil BANG ,  Jooho LEE ,  Junghwa KIM ,  Haeryong KIM ,  Myoungho JEONG

IPC: H01L21/02 ,  H01L29/786 ,  H01L29/66 ,  H01L21/768

Abstract: A semiconductor device and a method of manufacturing the semiconductor device are included. The method of manufacturing the semiconductor device includes forming a hafnium oxide layer on a substrate and crystallizing the hafnium oxide layer by using a hafnium cobalt oxide layer as a seed layer. According to the method of manufacturing the semiconductor device, a thin-film hafnium oxide layer may be easily crystallized.

公开(公告)号：US20240015949A1

公开(公告)日：2024-01-11

申请号：US18333213

申请日：2023-06-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Kyooho JUNG ,  Jongyeong MIN ,  Jiye BAEK ,  Yeseul LEE ,  Jinwook LEE ,  Wonsik CHOI

IPC: H10B12/00

CPC classification number: H10B12/315 ,  H10B12/0335 ,  H10B12/34

Abstract: An integrated circuit device may include a plurality of lower electrodes above a substrate, a supporter between the plurality of lower electrodes, an upper electrode on the plurality of lower electrodes, and a capacitor dielectric film between the upper electrode and the plurality of lower electrodes. The supporter may include one of a metal oxide, a metal nitride, and a metal oxynitride. A portion of the capacitor dielectric film may include a dopant. The dopant in the portion of the capacitor dielectric film and a metal in the supporter may be a same metal.

公开(公告)号：US20230005922A1

公开(公告)日：2023-01-05

申请号：US17571935

申请日：2022-01-10

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Kyooho JUNG ,  Yukyung SHIN ,  Jinho LEE

IPC: H01L27/108

Abstract: A semiconductor device including a substrate; bottom electrodes on the substrate, each bottom electrode including a first region and a second region, the second region containing an additional element relative to the first region; a first supporting pattern on the substrate and in contact with a portion of a side surface of each bottom electrode; a top electrode on the bottom electrodes; a dielectric layer between the bottom electrodes and the top electrode; and a capping layer between the bottom electrodes and the dielectric layer, the capping layer covering a top surface and a bottom surface of the first supporting pattern, wherein the second region is in contact with the capping layer, and the capping layer and the dielectric layer include different materials from each other.