公开(公告)号：US20180166136A1

公开(公告)日：2018-06-14

申请号：US15683876

申请日：2017-08-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Mu Hui Park

IPC: G11C13/00

CPC classification number: G11C13/0064 ,  G11C13/00 ,  G11C13/004

Abstract: A memory device and a method for operating the memory device are provided. A resistive memory cell connected to a first node and configured to include a variable resistive element and an access element for controlling a current flowing through the variable resistive element. A detection circuit detects a threshold voltage of the access element and provides a detection current to a sensing node. A clamping circuit connected between the first node and the sensing node receives a first read voltage and ramps up a voltage of the first node. The first node is discharged by a discharge circuit when the detection current becomes equal to a bit line current flowing through the first node while the clamping circuit ramps up the voltage of the first node. A sense amplifier transitions an output voltage value when a voltage level of the sensing node becomes lower than a reference voltage.

公开(公告)号：US10083746B2

公开(公告)日：2018-09-25

申请号：US15683876

申请日：2017-08-23

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mu Hui Park

IPC: G11C11/00 ,  G11C13/00

CPC classification number: G11C13/0064 ,  G11C13/0004 ,  G11C13/0007 ,  G11C13/0026 ,  G11C13/004 ,  G11C2013/005 ,  G11C2013/0052 ,  G11C2013/0054 ,  G11C2213/72 ,  G11C2213/76

Abstract: A memory device and a method for operating the memory device are provided. A resistive memory cell connected to a first node and configured to include a variable resistive element and an access element for controlling a current flowing through the variable resistive element. A detection circuit detects a threshold voltage of the access element and provides a detection current to a sensing node. A clamping circuit connected between the first node and the sensing node receives a first read voltage and ramps up a voltage of the first node. The first node is discharged by a discharge circuit when the detection current becomes equal to a bit line current flowing through the first node while the clamping circuit ramps up the voltage of the first node. A sense amplifier transitions an output voltage value when a voltage level of the sensing node becomes lower than a reference voltage.

公开(公告)号：US11948631B2

公开(公告)日：2024-04-02

申请号：US17314161

申请日：2021-05-07

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Hui Na ,  Mu Hui Park ,  Kwang Jin Lee ,  Yong Jun Lee

IPC: G11C11/00 ,  G11C13/00 ,  H10N70/20

CPC classification number: G11C13/0004 ,  G11C13/004 ,  H10N70/231 ,  G11C2013/0057 ,  G11C2213/72 ,  G11C2213/76

Abstract: A memory device includes a memory cell array including a plurality of memory cells, each of the plurality of memory cells having a switch element, and a data storage element connected to the switch element and containing a phis change material; and a memory controller for obtaining first read voltages from the plurality of memory cells, inputting a first write current to the plurality of memory cells, and then, obtaining second read voltages from the plurality of memory cells, wherein the memory controller compares the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell.

公开(公告)号：US11056187B2

公开(公告)日：2021-07-06

申请号：US16034921

申请日：2018-07-13

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Tae Hui Na ,  Mu Hui Park ,  Kwang Jin Lee ,  Yong Jun Lee

IPC: G11C13/00 ,  H01L45/00

Abstract: A memory device includes a memory cell array including a plurality of memory cells, each of the plurality of memory cells having a switch element, and a data storage element connected to the switch element and containing a phase-change material; and a memory controller for obtaining first read voltages from the plurality of memory cells, inputting a first write current to the plurality of memory cells, and then, obtaining second read voltages from the plurality of memory cells, wherein the memory controller compares the first read voltage of a first memory cell of the plurality of memory cells to the second read voltage of the first memory cell to determine a state of the first memory cell.

公开(公告)号：US10102897B2

公开(公告)日：2018-10-16

申请号：US15697000

申请日：2017-09-06

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Mu Hui Park

IPC: G11C16/26 ,  G11C11/16 ,  G11C13/00 ,  G11C11/56

Abstract: A memory device includes: a resistive memory cell connected to a first node; a current supply unit providing to a sensing node a comparison current to be compared with a cell current flowing through the first node to read data stored in the resistive memory cell; a clamping unit connected between the sensing node and the first node and including a transistor and a capacitor connected to a gate of the transistor via a second node; and a sense amplifier sensing the sensing node voltage and transitioning an output value when the sensing node voltage is less than a reference voltage. The clamping unit receives a first read voltage and a boost voltage, ramps up a voltage of the first node in a first precharge mode, and adjusts a level of a second read voltage of the second node in a second precharge mode.