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公开(公告)号：US20230197460A1
公开(公告)日：2023-06-22
申请号：US18072998
申请日：2022-12-01
发明人： Jaewon YANG , Seongjin PARK , Sangchul YEO , Seonmin RHEE , Hyeok LEE , Sooryong LEE , Seungju HAN
IPC分类号： H01L21/308 , G06T3/40 , G06V10/46 , G06V10/82 , G03F7/20
CPC分类号： H01L21/308 , G03F7/70616 , G06T3/4007 , G06V10/46 , G06V10/82
摘要： A semiconductor device patterning method includes generating an input image by imaging information about a pattern of a sample, acquiring an output image of the pattern of the sample after a preset semiconductor process with respect to the sample, generating a predictive model through learning using a Deep Neural Network (DNN) with the input image and the output image, and predicting a pattern image after the semiconductor process for a pattern of a semiconductor device by using the predictive model.
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公开(公告)号：US20230281792A1
公开(公告)日：2023-09-07
申请号：US18060260
申请日：2022-11-30
发明人： Sooryong LEE , Jaewon YANG , Kyoung Cho NA , Jihong KIM , Sang Chul YEO , Hyeok LEE
IPC分类号： G06T7/00 , G06T11/00 , G06T3/40 , G06F30/392
CPC分类号： G06T7/001 , G06T11/00 , G06T3/40 , G06F30/392 , G06T2207/30148 , G06T2207/20081
摘要： Disclosed is an operating method of an electronic device which includes a processor executing a semiconductor layout simulation module based on machine learning. The operating method includes receiving, at the semiconductor layout simulation module executed by the processor, a layout image, inferring a wafer image based on the layout image and a fabrication device information image of a semiconductor fabrication device fabricating a semiconductor integrated circuit based on a final layout image, adjusting the layout image when the wafer image is not acceptable, and confirming the layout image as the final layout image when the wafer image is acceptable.
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公开(公告)号：US20230280646A1
公开(公告)日：2023-09-07
申请号：US17972231
申请日：2022-10-24
发明人： Kyungsoo KIM , Sooryong LEE , Jaewon YANG , Sangchul YEO , Hyeok LEE
摘要： The inventive concept provides a corner rounding method of a deep learning-based optical proximity correction (OPC) pattern by which patterning reliability may be ensured, and an OPC method and a mask manufacturing including the corner rounding method. The corner rounding method of a deep learning-based OPC pattern includes: obtaining a contour of a photoresist (PR) pattern or an etching pattern on a wafer; obtaining a square layout of the PR pattern or the etching pattern corresponding to the contour; generating a transform model through deep learning with the square layout and the contour; and obtaining a rounded layout target with respect to a square layout target by using the transform model.
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公开(公告)号：US20230169641A1
公开(公告)日：2023-06-01
申请号：US17842206
申请日：2022-06-16
发明人： Kyenhee LEE , Mincheol KANG , Sooryong LEE
CPC分类号： G06T7/001 , G06T7/11 , G06T7/97 , G06N3/0454 , G06T2207/30148 , G06T2207/10061 , G06T2207/20081 , G06T2207/20221 , G06T2207/10024 , G06T2207/20084
摘要： The inventive concept provides a defect detection method of a semiconductor element, capable of promptly and accurately detecting a defect, and predicting a type of the defect with respect to various defects of the semiconductor element, and a semiconductor element manufacturing method including the defect detection method. The defect detection method is capable of promptly and accurately detecting the defect, and predicting the type of the defect with respect to various defects of the semiconductor element, by generating a first segmentation image and a second segmentation image; converting the first segmentation image and the second segmentation image into an image of a first color and a second color, respectively; generating a combination image; classifying the type of a defect; generating a defect detection model by using deep learning, and detecting a defect of the semiconductor element by using a defect detection process using the defect detection model.
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公开(公告)号：US20230062677A1
公开(公告)日：2023-03-02
申请号：US17735593
申请日：2022-05-03
发明人： Sang Chul YEO , Min-Cheol KANG , Sooryong LEE
摘要： Disclosed are a method of forming an optical proximity correction (OPC) model and/or a method of fabricating a semiconductor device using the same. The method of forming the OPC model may include obtaining a scanning electron microscope (SEM) image, which is an average image of a plurality of images taken using one or more scanning electron microscopes, and a graphic data system (GDS) image, which is obtained by imaging a designed layout, aligning the SEM image and the GDS image, performing an image filtering process on the SEM image, extracting a contour from the SEM image, and verifying the contour. The verifying of the contour may be performed using a genetic algorithm. Variables in the genetic algorithm may include first parameters related to the image alignment process, second parameters related to the image filtering process, and third parameters related to a critical dimension (CD) measurement process.
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