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公开(公告)号：US11700005B2
公开(公告)日：2023-07-11
申请号：US17509540
申请日：2021-10-25
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Kangyeop Choo , Insung Kim , Wooseok Kim , Taeik Kim , Sunghyuck Lee , Chanyoung Jeong
CPC classification number: H03L7/0891 , H03L7/101
Abstract: A phased locked loop includes; a load circuit that generates an output signal in response to a driving voltage, a frequency calibration circuit that generates a calibration signal in response to an output frequency of the output signal and a target frequency, and a regulator that generates the driving voltage in response to the calibration signal.
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公开(公告)号：US11664579B2
公开(公告)日：2023-05-30
申请号：US16655969
申请日：2019-10-17
Applicant: Samsung Electronics Co., Ltd.
Inventor： Jonghyuck Lee , Taeik Kim , Haeyeon Kim , Sehyun Park , Dongjun Oh , Shinho Yoon , Myeongsu Oh
CPC classification number: H01Q1/2266 , G06F1/1616 , H01Q1/2291 , H01Q1/243 , H04M1/0216 , H05K1/118
Abstract: An electronic device is provided. The electronic device includes a foldable housing, a flexible display, at least one printed circuit board (PCB), and a wireless communication circuit. The foldable housing includes a hinge structure, a first housing structure connected to the hinge structure and including a first surface facing in a first direction, a second surface facing in a direction opposite to the first direction, and a first lateral member surrounding a first space between the first surface and the second surface, and a second housing structure connected to the hinge structure and including a third surface facing in a second direction, a fourth surface facing in a direction opposite to the second direction, and a second lateral member surrounding a second space between the third surface and the fourth surface.
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公开(公告)号：US20190199357A1
公开(公告)日：2019-06-27
申请号：US16290067
申请日：2019-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungjin KIM , Jihyun Kim , Taeik Kim
Abstract: A non-linear spread spectrum clock generator using a linear combination may include a phase locked loop configured to receive a reference signal and generate an output signal according to the reference signal and a feedback signal that compensates for the output signal. The phase locked loop may include a divider configured to generate the feedback signal by dividing the output signal by a divisional ratio. The non-linear spread spectrum clock generator may include a non-linear profile generator configured to generate a non-linear signal by selectively outputting selected ones of a plurality of signals according to the absolute magnitudes of the signals and a delta-sigma modulator configured to receive the outputted linear ramp function and to change the divisional ratio. The signals may vary according to different linear ramp functions. The different ramp functions may include different slopes and initiation time values.
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公开(公告)号：US20180375523A1
公开(公告)日：2018-12-27
申请号：US15861962
申请日：2018-01-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonsik Yu , Wooseok Kim , Jihyun Kim , Taeik Kim , Kangyeop Choo
Abstract: A digital phase locked loop includes a digital phase detector, a digital loop filter, a digital controlled oscillator, a first divider that divides the second frequency of the oscillation signal depending on a first division value and outputs the division result as a division signal having a third frequency, a second divider that divides the second frequency of the oscillation signal depending on a second division value and outputs the division result as an output signal having a final frequency, a dithering block that receives the division signal and performs dithering on the first division value based on a preset pattern as cycles of the division signal pass, and a digital phase domain filter that performs second low pass filtering on the division signal in a phase domain and outputs the result of the second low pass filtering as the feedback signal.
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公开(公告)号：US10158367B1
公开(公告)日：2018-12-18
申请号：US15861962
申请日：2018-01-04
Applicant: Samsung Electronics Co., Ltd.
Inventor： Wonsik Yu , Wooseok Kim , Jihyun Kim , Taeik Kim , Kangyeop Choo
CPC classification number: H03L7/235 , H03K5/135 , H03L7/095 , H03L7/18 , H03L2207/08
Abstract: A digital phase locked loop includes a digital phase detector, a digital loop filter, a digital controlled oscillator, a first divider that divides the second frequency of the oscillation signal depending on a first division value and outputs the division result as a division signal having a third frequency, a second divider that divides the second frequency of the oscillation signal depending on a second division value and outputs the division result as an output signal having a final frequency, a dithering block that receives the division signal and performs dithering on the first division value based on a preset pattern as cycles of the division signal pass, and a digital phase domain filter that performs second low pass filtering on the division signal in a phase domain and outputs the result of the second low pass filtering as the feedback signal.
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Patent Agency Ranking
公开(公告)号：US12199654B2
公开(公告)日：2025-01-14
申请号：US17721581
申请日：2022-04-15
Applicant: Samsung Electronics Co., Ltd.
Inventor： Shinho Yoon , Taeyoon Seo , Myeongjun Kong , Taeik Kim , Donjun Oh , Soonho Hwang
IPC: H04B1/38 , H04B1/3827
Abstract: An antenna and an electronic device including the same are provided. The electronic device includes a first housing including a first conductive portion through a portion of a side surface and including a first space, a second housing slidable along a first direction from the first housing, a flexible display including at least a partially variable display area when transitioning from a slide-in state to a slide-out state, and a wireless communication circuit disposed in the first space and configured to transmit or receive a wireless signal in a frequency band through the first conductive portion. The first conductive portion includes a first portion having a first length along the first direction, a second portion spaced apart from the first portion at a predetermined interval and having a second length in the first direction, and a third portion connecting to a first end of the first portion and a first end of the second portion. The frequency band is determined based on a third length extending from the first portion, through the third portion, to the second portion.
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公开(公告)号：US11962068B2
公开(公告)日：2024-04-16
申请号：US17431861
申请日：2020-02-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Dongjun Oh , Taeik Kim , Haeyeon Kim , Sehyun Park , Shinho Yoon , Jonghyuck Lee
CPC classification number: H01Q1/243 , H01Q5/328 , H01Q5/385 , H01Q21/28 , H04B1/40 , H04M1/0216 , H04M1/0268 , H04M1/0277
Abstract: An electronic device is provided. The electronic device includes a first housing structure, a second housing structure, and a foldable housing structure for connecting the first housing structure and the second housing structure. The first housing structure and the second housing structure may include a front plate for interconnecting front surfaces with a flexible display, a rear plate which is an opposite surface to the front plate, a side member which surrounds a space between the front plate and the rear plate, and includes at least in part a conductive portion and an insulating portion, a communication circuit and at least one switch electrically connected to the communication circuit.
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公开(公告)号：US11789482B2
公开(公告)日：2023-10-17
申请号：US17702482
申请日：2022-03-23
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Jusung Lee , Wooseok Kim , Taeik Kim , Chanyoung Jeong
Abstract: A bandgap reference circuit includes a reference current generation circuit configured to output a bandgap reference current insensitive to a temperature change, by using a first voltage inversely proportional to temperature and a third voltage proportional to temperature. The third voltage is a difference between the first voltage and a second voltage. The bandgap reference circuit further includes a resistivity temperature coefficient cancellation circuit configured to remove a first current proportional to temperature from the bandgap reference current by using the third voltage, and a reference voltage generation circuit configured to output a bandgap reference voltage insensitive to a temperature change by using a second current inversely proportional to temperature and a first resistance proportional to temperature. The second current is generated by removing the first current from the bandgap reference current.
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公开(公告)号：US10804907B2
公开(公告)日：2020-10-13
申请号：US16290067
申请日：2019-03-01
Applicant: Samsung Electronics Co., Ltd.
Inventor： Seungjin Kim , Jihyun Kim , Taeik Kim
Abstract: A non-linear spread spectrum clock generator using a linear combination may include a phase locked loop configured to receive a reference signal and generate an output signal according to the reference signal and a feedback signal that compensates for the output signal. The phase locked loop may include a divider configured to generate the feedback signal by dividing the output signal by a divisional ratio. The non-linear spread spectrum clock generator may include a non-linear profile generator configured to generate a non-linear signal by selectively outputting selected ones of a plurality of signals according to the absolute magnitudes of the signals and a delta-sigma modulator configured to receive the outputted linear ramp function and to change the divisional ratio. The signals may vary according to different linear ramp functions. The different ramp functions may include different slopes and initiation time values.
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公开(公告)号：US12204389B2
公开(公告)日：2025-01-21
申请号：US17394520
申请日：2021-08-05
Applicant: SAMSUNG ELECTRONICS CO., LTD.
Inventor： Insung Kim , Joomyoung Kim , Wooseok Kim , Taeik Kim
Abstract: An electronic device including: a regulator circuit configured to output a regulated voltage based on a reference voltage and a feedback voltage; and an oscillator configured to generate an output frequency signal based on a reference frequency signal and the regulated voltage output from the regulator circuit, wherein the regulator circuit includes: a feedback loop configured to output the regulated voltage based on a difference between the reference voltage and the feedback voltage; a first capacitor; a precharge circuit connected to the feedback loop, and configured to charge the first capacitor with a second voltage which is based on a first voltage; a first switch configured to connect the precharge circuit with the first capacitor; and a second switch configured to connect the first capacitor with the feedback loop.
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