公开(公告)号：US10121794B2

公开(公告)日：2018-11-06

申请号：US15279959

申请日：2016-09-29

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Marika Gunji-Yoneoka ,  Atsushi Suyama ,  Jayavel Pachamuthu ,  Tsuyoshi Hada ,  Daewung Kang ,  Murshed Chowdhury ,  James Kai ,  Hiro Kinoshita ,  Tomoyuki Obu ,  Luckshitha Suriyasena Liyanage

IPC: H01L27/115 ,  H01L27/11556 ,  H01L27/11524 ,  H01L27/11582 ,  H01L27/1157

Abstract: An alternating stack of insulating layers and spacer material layers is formed over a semiconductor substrate. Memory openings are formed through the alternating stack. An optional silicon-containing epitaxial pedestal and a memory film are formed in each memory opening. After forming an opening through a bottom portion of the memory film within each memory opening, a germanium-containing semiconductor layer and a dielectric layer is formed in each memory opening. Employing the memory film and the dielectric layer as a crucible, a liquid phase epitaxy anneal is performed to convert the germanium-containing semiconductor layer into a germanium-containing epitaxial channel layer. A dielectric core and a drain region can be formed over the dielectric layer. The germanium-containing epitaxial channel layer is single crystalline, and can provide a higher charge carrier mobility than a polysilicon channel.

公开(公告)号：US10115899B1

公开(公告)日：2018-10-30

申请号：US15631979

申请日：2017-06-23

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yusuke Yoshida ,  Tomohiro Uno ,  Tomoyuki Obu ,  Takeki Ninomiya ,  Toshihiro Iizuka

IPC: H01L21/00 ,  H01L45/00 ,  H01L27/24 ,  H01L23/528

Abstract: A method is provided that includes forming a word line above a substrate, the word line disposed in a first direction, forming a bit line above the substrate, the bit line disposed in a second direction perpendicular to the first direction, forming a nonvolatile memory material between the word line and the bit line by selectively forming a conductive oxide material layer adjacent the word line, and forming a semiconductor material layer adjacent the bit line, and forming a memory cell comprising the nonvolatile memory material at an intersection of the bit line and the word line.

公开(公告)号：US11217532B2

公开(公告)日：2022-01-04

申请号：US16020008

申请日：2018-06-27

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Rahul Sharangpani ,  Raghuveer S. Makala ,  Fei Zhou ,  Adarsh Rajashekhar ,  Tatsuya Hinoue ,  Tomoyuki Obu ,  Tomohiro Uno ,  Yusuke Mukae

IPC: H01L29/76 ,  H01L23/532 ,  H01L27/11556 ,  H01L29/49 ,  H01L21/768 ,  H01L27/11582 ,  H01L27/11524 ,  H01L27/11529 ,  H01L27/1157 ,  H01L27/11573 ,  H01L27/11519 ,  H01L27/11565

Abstract: A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each of the electrically conductive layers includes a stack of a compositionally graded diffusion barrier and a metal fill material portion, and the compositionally graded diffusion barrier includes a substantially amorphous region contacting the interface between the compositionally graded diffusion barrier and a substantially crystalline region that is spaced from the interface by the amorphous region. The substantially crystalline region effectively blocks atomic diffusion, and the amorphous region induces formation of large grains during deposition of the metal fill material portions.

公开(公告)号：US11127759B2

公开(公告)日：2021-09-21

申请号：US16800078

申请日：2020-02-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tomoyuki Obu ,  Daisuke Miyake

IPC: H01L27/11582 ,  H01L27/11556 ,  H01L27/11565 ,  H01L27/11524 ,  H01L27/1157 ,  H01L27/11519

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. A layer stack including a charge storage layer, a tunneling dielectric layer, a semiconductor material layer, and a dielectric material layer is formed in the memory openings. The dielectric material layer may include a doped silicate glass layer. A doped silicate glass pillar can be formed at a bottom portion of each memory opening, and a bottom portion of the semiconductor material layer can be converted into a source region by outdiffusion of dopants from the doped silicate glass pillar. Alternatively, the semiconductor material layer can be heavily doped, and can be recessed to form a source region.

公开(公告)号：US10355100B1

公开(公告)日：2019-07-16

申请号：US15982266

申请日：2018-05-17

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Yu Ueda ,  Tomoyuki Obu ,  Kazutaka Yoshizawa ,  Yasuyuki Aoki ,  Eisuke Takii ,  Akio Nishida

IPC: H01L29/51 ,  H01L29/78 ,  H01L27/115 ,  H01L27/092 ,  H01L23/532 ,  H01L27/1157 ,  H01L27/11524 ,  H01L27/11529

Abstract: A first field effect transistor and a second field effect transistor are formed on a substrate. A silicon nitride liner is formed over the first field effect transistor and the second field effect transistor. An upper portion of the silicon nitride liner is converted into a thermal silicon oxide liner. A lower portion of the silicon nitride liner remains as a silicon nitride material portion. A first portion of the thermal silicon oxide liner is removed from above the second field effect transistor, and a second portion of the thermal silicon oxide liner remains above the first field effect transistor. Selective presence of the silicon oxide liner provides differential stress within the channels of the first and second field effect transistors, which can be employed to optimize performance of different types of field effect transistors.

公开(公告)号：US11121153B1

公开(公告)日：2021-09-14

申请号：US16800097

申请日：2020-02-25

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tomoyuki Obu ,  Shinsuke Yada

IPC: H01L21/00 ,  H01L27/11582 ,  H01L29/66 ,  H01L27/11519 ,  H01L29/10 ,  H01L29/06 ,  H01L21/311 ,  H01L21/28 ,  H01L21/02 ,  H01L27/11573 ,  H01L27/11575 ,  H01L27/11526 ,  H01L27/11548 ,  H01L27/11556 ,  H01L27/11565 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792 ,  H01L29/417

Abstract: An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory openings are formed through the alternating stack. A layer stack including a charge storage layer, a tunneling dielectric layer, a semiconductor material layer, and a dielectric material layer is formed in the memory openings. The dielectric material layer may include a doped silicate glass layer. A doped silicate glass pillar can be formed at a bottom portion of each memory opening, and a bottom portion of the semiconductor material layer can be converted into a source region by outdiffusion of dopants from the doped silicate glass pillar. Alternatively, the semiconductor material layer can be heavily doped, and can be recessed to form a source region.

公开(公告)号：US10229931B1

公开(公告)日：2019-03-12

申请号：US15831481

申请日：2017-12-05

Applicant: SANDISK TECHNOLOGIES LLC

Inventor： Tatsuya Hinoue ,  Tomoyuki Obu

IPC: H01L27/115 ,  G11C16/08 ,  G11C16/04 ,  H01L29/423 ,  H01L27/11582 ,  H01L27/11565 ,  H01L27/11529

Abstract: A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming memory stack structures through the alternating stack, such that each of the memory stack structures includes a memory film and a vertical semiconductor channel, forming backside recesses by removing the sacrificial material layers selective to the insulating layers and the memory stack structures, forming a backside blocking dielectric layer in the backside recesses, forming an amorphous titanium oxide layer on surfaces of the backside blocking dielectric layer in the backside recesses, and forming tungsten word lines in the backside recesses using a fluorine-free tungsten-containing precursor gas.