-
公开(公告)号：US10916504B2
公开(公告)日：2021-02-09
申请号：US16441439
申请日：2019-06-14
IPC分类号： H01L21/28 , H01L29/49 , H01L27/11582 , H01L23/532 , H01L21/768
摘要： An alternating stack of insulating layers and sacrificial material layers is formed over a substrate. Memory stack structures are formed through the alternating stack. Each of the memory stack structures includes a memory film and a vertical semiconductor channel. Backside recesses are formed by removing the sacrificial material layers selective to the insulating layers and the memory stack structures. Electrically conductive layers are formed in the backside recesses. Each of the electrically conductive layers includes a molybdenum-containing conductive liner and a metal fill portion including a metal other than molybdenum.
-
公开(公告)号：US12101936B2
公开(公告)日：2024-09-24
申请号：US17523487
申请日：2021-11-10
发明人： Tatsuya Hinoue , Yusuke Mukae , Ryousuke Itou , Masanori Tsutsumi , Akio Nishida , Ramy Nashed Bassely Said
IPC分类号： H01L27/11582 , H10B41/27 , H10B43/27
摘要： A method of forming a three-dimensional memory device includes forming an alternating stack of insulating layers and sacrificial material layers over a substrate, forming a memory opening extending through the alternating stack, forming a sacrificial memory opening fill structure in the memory opening, replacing the sacrificial material layers with electrically conductive layers, removing the sacrificial memory opening fill structure selective to the electrically conductive layers, and forming a memory opening fill structure the memory opening after replacing the sacrificial material layers with electrically conductive layers and after removing the sacrificial memory opening fill structure. The memory opening fill structure includes a memory film and a vertical semiconductor channel.
-
公开(公告)号：US11377733B2
公开(公告)日：2022-07-05
申请号：US16987717
申请日：2020-08-07
IPC分类号： C23C16/08 , C23C16/448 , C23C16/455 , C23C16/52 , C23C16/02
摘要： A method of depositing tungsten over a substrate includes disposing the substrate into a vacuum enclosure of a tungsten deposition apparatus, performing a first tungsten deposition process that deposits a first tungsten layer over a physically exposed surface of the substrate by flowing a fluorine-containing tungsten precursor gas into the vacuum enclosure, performing an in-situ oxidation process by exposing the first tungsten layer to an oxidation agent gas while the substrate remains within the vacuum enclosure without breaking vacuum and forming a tungsten oxyfluoride gas which is pumped out of the vacuum enclosure, and performing a second tungsten deposition process that deposits a second tungsten layer on the first tungsten layer by flowing the fluorine-containing tungsten precursor gas into the vacuum enclosure in a second tungsten deposition process after the in-situ oxidation process.
-
4.发明授权公开(公告)号：US11289416B2
公开(公告)日：2022-03-29
申请号：US16695775
申请日：2019-11-26
发明人： Masanori Tsutsumi , Naohiro Hosoda , Shuichi Hamaguchi , Kazuki Isozumi , Genta Mizuno , Yusuke Mukae , Ryo Nakamura , Yu Ueda
IPC分类号： H01L29/76 , H01L23/522 , H01L23/532 , H01L27/11519 , H01L27/11582 , H01L27/11556 , H01L27/11565 , H01L27/1157 , H01L27/11524
摘要： A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.
-
公开(公告)号：US11217532B2
公开(公告)日：2022-01-04
申请号：US16020008
申请日：2018-06-27
发明人： Rahul Sharangpani , Raghuveer S. Makala , Fei Zhou , Adarsh Rajashekhar , Tatsuya Hinoue , Tomoyuki Obu , Tomohiro Uno , Yusuke Mukae
IPC分类号： H01L29/76 , H01L23/532 , H01L27/11556 , H01L29/49 , H01L21/768 , H01L27/11582 , H01L27/11524 , H01L27/11529 , H01L27/1157 , H01L27/11573 , H01L27/11519 , H01L27/11565
摘要： A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers located over a substrate and memory stack structures extending through the alternating stack. Each of the electrically conductive layers includes a stack of a compositionally graded diffusion barrier and a metal fill material portion, and the compositionally graded diffusion barrier includes a substantially amorphous region contacting the interface between the compositionally graded diffusion barrier and a substantially crystalline region that is spaced from the interface by the amorphous region. The substantially crystalline region effectively blocks atomic diffusion, and the amorphous region induces formation of large grains during deposition of the metal fill material portions.
-
公开(公告)号：US10608010B2
公开(公告)日：2020-03-31
申请号：US16002265
申请日：2018-06-07
发明人： Yujin Terasawa , Genta Mizuno , Yusuke Mukae , Yoshinobu Tanaka , Shiori Kataoka , Ryosuke Itou , Kensuke Yamaguchi , Naoki Takeguchi
IPC分类号： H01L27/11582 , H01L27/11524 , H01L27/11556 , H01L27/11529 , H01L27/1157 , H01L21/768 , H01L23/522 , H01L23/528 , H01L27/11573
摘要： An alternating stack of insulating layers and sacrificial material layers is formed with stepped surfaces. Sacrificial metal plates are formed on the top surfaces of the sacrificial material layers, and a retro-stepped dielectric material portion is formed over the sacrificial metal plates. Contact via cavities are formed through the retro-stepped dielectric material portion employing the sacrificial metal plates as etch stop structures. The sacrificial metal plates are replaced with portions of insulating spacer layers. Sacrificial via fill structures within remaining volumes of the contact via cavities. The sacrificial material layers are replaced with electrically conductive layers. The sacrificial via fill structures are replaced with portions of staircase-region contact via structures that contact the electrically conductive layers.
-
公开(公告)号：US12029037B2
公开(公告)日：2024-07-02
申请号：US17507224
申请日：2021-10-21
发明人： Masanori Tsutsumi , Yusuke Mukae , Tatsuya Hinoue , Yuki Kasai
摘要： A three-dimensional memory device includes an alternating stack of insulating layers and electrically conductive layers, and memory stack structures extending through the alternating stack. Each of the memory stack structures includes a vertical semiconductor channel, a tunneling dielectric layer, a vertical stack of discrete silicon nitride memory elements located at levels of the electrically conductive layers, and a vertical stack of discrete silicon oxide blocking dielectric structures laterally surrounding the vertical stack of discrete silicon nitride memory elements. Each of the silicon oxide blocking dielectric structures includes a silicon oxynitride surface region, and an atomic concentration of nitrogen atoms within the silicon oxynitride surface region decreases with a lateral distance from an interface between the silicon oxynitride surface region and a respective one of the silicon nitride memory elements.
-
8.发明授权公开(公告)号：US11894298B2
公开(公告)日：2024-02-06
申请号：US17655827
申请日：2022-03-22
发明人： Masanori Tsutsumi , Naohiro Hosoda , Shuichi Hamaguchi , Kazuki Isozumi , Genta Mizuno , Yusuke Mukae , Ryo Nakamura , Yu Ueda
IPC分类号： H01L23/522 , H01L23/532 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
CPC分类号： H01L23/5226 , H01L23/53223 , H10B41/10 , H10B41/27 , H10B41/35 , H10B43/10 , H10B43/27 , H10B43/35
摘要： A semiconductor structure includes an alternating stack of insulating layers and electrically conductive layers located over a substrate, memory openings vertically extending through the alternating stack, memory opening fill structures located in the memory openings, where each of the memory opening fill structures contains a memory film and a vertical semiconductor channel that extend vertically, and each memory film includes a crystalline blocking dielectric metal oxide layer, and a metal oxide amorphous dielectric nucleation layer located between each of the vertically neighboring electrically conductive layers and insulating layers, and located between each of the crystalline blocking dielectric metal oxide layers and each of the electrically conductive layers.
-
-
-
-
-
-
-
搜索结果
8 条记录 (耗时 0.015 秒)
