-
公开(公告)号:US11963402B2
公开(公告)日:2024-04-16
申请号:US17438134
申请日:2019-03-25
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Masayuki Kanehiro , Youhei Nakanishi , Takeshi Ishida
IPC: H10K59/122 , H10K50/84 , H10K59/131 , H10K59/35
CPC classification number: H10K59/122 , H10K50/841 , H10K59/131 , H10K59/35
Abstract: A display device includes a light-emitting element layer including a plurality of light-emitting elements. The light-emitting element layer includes, for each of the plurality of light-emitting elements, a first electrode and a plurality of openings exposing the first electrode, and includes an edge cover covering an end portion of the first electrode, a plurality of light-emitting layers covering each of the plurality of openings, and a second electrode that is common to the plurality of light-emitting elements and covers the plurality of light-emitting layers. The second electrode includes a metal nanowire. Furthermore, the light-emitting element layer includes an auxiliary wiring line provided in a lattice pattern in a position overlapping the edge cover, and the auxiliary wiring line and the metal nanowire are electrically connected to each other.
-
公开(公告)号:US11217763B2
公开(公告)日:2022-01-04
申请号:US16644057
申请日:2017-09-05
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Yuto Tsukamoto , Shinichi Kawato , Tokiyoshi Umeda , Manabu Niboshi , Youhei Nakanishi , Hisayuki Utsumi , Masayuki Kanehiro , Shota Okamoto
Abstract: To provide a light-emitting device that can obtain fluorescence having a narrow spectrum more efficiently, a light-emitting device includes: a light-emitting layer in which thermally activated delayed fluorescence bodies and quantum dots are dispersed; a first electrode in a lower layer than the light-emitting layer; and a second electrode in an upper layer than the light-emitting layer, wherein a light emission spectrum of the thermally activated delayed fluorescence bodies and an absorption spectrum of the quantum dots at least partially overlap each other.
-
公开(公告)号:US10725355B2
公开(公告)日:2020-07-28
申请号:US16333605
申请日:2017-09-13
Applicant: Sharp Kabushiki Kaisha
Inventor: Masayuki Kanehiro , Youhei Nakanishi
IPC: G02F1/1343 , G02F1/1362 , G02F1/1337 , G02F1/1335 , G02F1/1333
Abstract: An object of the present invention is to enhance a display quality of a liquid crystal display panel by causing a contour of a display region not to be noticeable. A display region of a liquid crystal display panel (100) includes a normal display region (101a) and a boundary display region (101c), an image being displayed more darkly in the boundary display region (101c), which is in contact with a black light blocking part (101b), than in the normal display region (101a).
-
公开(公告)号:US10444560B2
公开(公告)日:2019-10-15
申请号:US15756600
申请日:2016-09-02
Applicant: Sharp Kabushiki Kaisha , TECNISCO, LTD.
Inventor: Masayuki Kanehiro , Youhei Nakanishi , Takuya Amada , Koji Hashimoto , Hokichi Yoshioka
IPC: G02F1/1335 , G02F1/1333 , G02F1/1339 , G02F1/1337 , G02F1/1343 , G02F1/1362 , G02F1/1347
Abstract: A method of producing display panels of collectively producing a plurality of display panels each including a contour line of an outer shape, at least a section of which is curved includes a bonding process of forming a bonded substrate by bonding a pair of substrates including a plurality of thin film patterns formed on at least one substrate, a stacking process of stacking a plurality of bonded substrates and pinching and holding the plurality of stacked bonded substrates in a stacking direction using a jig, and a grinding process of collectively forming end surfaces of the plurality of display panels forming the curved contour line by collectively grinding the pair of substrates located outside the thin film pattern among stacked bonded substrates along the outer shape in a state in which the plurality of stacked bonded substrate are pinched by the jig.
-
公开(公告)号:US10059881B2
公开(公告)日:2018-08-28
申请号:US14436532
申请日:2013-10-17
Applicant: Sharp Kabushiki Kaisha , Toyo Gosei Co., Ltd.
Inventor: Masanobu Mizusaki , Youhei Nakanishi , Takeshi Noma , Satoshi Enomoto
IPC: C09K19/56 , C09K19/20 , C09K19/52 , C08F22/36 , C08F222/36 , C07C69/602 , C07C233/55 , G02F1/1337 , C07C233/27 , C09K19/04 , C08F222/10 , G02F1/1341
CPC classification number: C09K19/56 , C07C69/602 , C07C233/27 , C07C233/55 , C08F22/36 , C08F222/36 , C08F2222/102 , C09K19/20 , C09K19/52 , C09K2019/0448 , G02F1/133711 , G02F1/133788 , G02F1/1341
Abstract: An aspect of the present invention provides a monomer from which a polymer layer capable of keeping high display quality even in high temperature and high humidity environments can be formed. The monomer in an aspect of the present invention is a compound represented by P-Sp1-Z2-A1-(Z1-A2)n1-Z3-Sp2-P: in the formula, P denotes the same or different radical polymerizable group; and at least one of Z1, Z2, and Z3 denotes —NRCO— or —CONR— group.
-
6.
公开(公告)号:US11502266B2
公开(公告)日:2022-11-15
申请号:US17041430
申请日:2018-03-28
Applicant: SHARP KABUSHIKI KAISHA
Inventor: Tokiyoshi Umeda , Yuto Tsukamoto , Masayuki Kanehiro , Youhei Nakanishi
Abstract: Alight-emitting element includes an anode electrode, a cathode electrode, a light-emitting layer, a positive hole transport layer, and an electron transport layer. The light-emitting layer, the positive hole transport layer, and the electron transport layer are provided between the anode electrode and the cathode electrode. The light-emitting layer includes QD phosphor particles, a positive hole transport substance configured to transport positive holes transported thereto by the positive hole transport layer, an electron transport substance configured to transport electrons transported thereto by the electron transport layer, and a photosensitive host material.
-
公开(公告)号:US10578941B2
公开(公告)日:2020-03-03
申请号:US16334772
申请日:2017-09-22
Applicant: Sharp Kabushiki Kaisha
Inventor: Shota Okamoto , Youhei Nakanishi , Masayuki Kanehiro
IPC: G02F1/1362 , H01L27/12 , G02F1/1368 , G02F1/1343 , G02F1/13 , G09F9/30
Abstract: In the present disclosure, regions where a short circuit may have occurred due to dividing are isolated from a display region. In a gate line (13G) of an nth row, a gate line detour section (50G) that is provided corresponding to an intersection (CG,n,m) with a source line (15S) of an mth column has: a start section (51G) which is bent toward the −Y direction from a start position (XG,m(1), YG,n) that is in the −X direction relative to the intersection; and straddling sections (52G) which straddle a straight line (X=XS,m+dS/2) that passes through a +X direction end of the intersection and extends in the Y axis direction.
-
公开(公告)号:US10401665B2
公开(公告)日:2019-09-03
申请号:US15575584
申请日:2016-05-20
Applicant: Sharp Kabushiki Kaisha
Inventor: Masayuki Kanehiro , Youhei Nakanishi
IPC: G02F1/1333 , G02F1/1335 , H01L27/12 , G02F1/1339 , G02F1/1345 , G02F1/1341
Abstract: A producing method includes a sealing agent portion disposing process of disposing sealing agent portions 40, a part of which is cut off, on one 30A of substrates, a bonding process of bonding the substrates 20A, 30A via the sealing agent portions 40, a first cutting process of cutting a bonded substrate into pieces each having thin film patterns arranged linearly, a liquid crystal injection process of collectively injecting liquid crystals 18A into a space within each of the sealing agent portions 40 through inlets 40A, a sealing process of sealing the inlets 40A with sealing resin, a second cutting process of cutting each piece of the bonded substrate into bonded substrate pieces, and a grinding process of collectively grinding the substrates included in the bonded substrate pieces that are outside the thin film patterns along an outline such that edge surfaces of the liquid crystal panels having curved outlines are collectively formed.
-
公开(公告)号:US10317713B2
公开(公告)日:2019-06-11
申请号:US15575588
申请日:2016-05-20
Applicant: Sharp Kabushiki Kaisha
Inventor: Masayuki Kanehiro , Youhei Nakanishi
IPC: G02F1/1333 , G04G9/00 , G02F1/1362 , H01L21/20 , H01L21/304 , G09F9/00 , G02F1/1345 , G02F1/1368
Abstract: A producing method includes a bonding process of bonding substrates in a pair one of which has thin film patterns and forming a bonded substrate, a cut forming process of forming a cut line CL1 on a border portion between the mounting area within the panel surface area and other area on the one substrate of the bonded substrate, a cutting process of cutting the bonded substrate into separated bonded substrate pieces, a grinding process of grinding the substrates in a pair that are outside the thin film pattern in each of the separated bonded substrates 50A along the outline and forming edge surfaces of the display panels each having the curved outline, and a removing process of cutting a part of the one substrate along the cut line and removing the part.
-
公开(公告)号:US09939696B2
公开(公告)日:2018-04-10
申请号:US15305394
申请日:2015-04-28
Applicant: Sharp Kabushiki Kaisha
Inventor: Youhei Nakanishi , Takayuki Nishiyama , Kohhei Tanaka , Takeshi Noma , Ryo Yonebayashi
IPC: G09G3/36 , G02F1/1362 , G02F1/1343 , G02F1/1368 , G09F9/30 , H01L21/822 , H01L27/04 , H01L29/786 , H01L27/02 , H01L27/12
CPC classification number: G02F1/136204 , G02F1/1343 , G02F1/1368 , G09F9/30 , G09G3/3648 , G09G3/3688 , G09G2300/0413 , G09G2300/0426 , G09G2300/08 , G09G2310/08 , G09G2330/04 , G09G2330/08 , H01L21/822 , H01L27/0255 , H01L27/0266 , H01L27/04 , H01L27/1244 , H01L29/786
Abstract: Provided is an active matrix substrate that can protected from static electricity, with the frame region being narrowed. An active matrix substrate (20a) includes a plurality of first lines (GL), a plurality of second lines (SL), and a protection part (50). The first lines are formed in a display region (30). The second lines are formed in the display region, and intersect with the first lines. The protection part protects the active matrix substrate from static electricity. The protection part includes a plurality of first protection circuits (50A), and a conductive unit (50B). The first protection circuits are connected to each of the first lines in the display region. The conductive unit is connected to each of the first protection circuits in the display region. Each of the first protection circuits, according to a potential of the first line to which the first protection circuit is connected, allows the first line and the conductive unit to be conductive with each other.
-
-
-
-
-
-
-
-
-