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公开(公告)号：US11342435B2
公开(公告)日：2022-05-24
申请号：US16772130
申请日：2017-12-14
发明人： Shunichi Nakamura
摘要： A wide gap semiconductor device has: a drift layer 12 using a first conductivity type wide gap semiconductor material; a well region 20, being a second conductivity type and provided in the drift layer 12; a polysilicon layer 150 provided on the well region 20; an interlayer insulating film 65 provided on the polysilicon layer 150; a gate pad 120 provided on the interlayer insulating film 65; and a source pad 110 electrically connected to the polysilicon layer 150.
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公开(公告)号：US10403497B2
公开(公告)日：2019-09-03
申请号：US15314471
申请日：2015-08-12
IPC分类号： H01L21/02 , H01L21/268 , H01L29/45 , H01L29/34 , H01L29/16 , H01L21/28 , H01L21/302 , H01L29/872 , H01L29/66 , H01L29/06 , H01L29/861 , H01L29/868 , H01L21/04 , H01L29/78
摘要： A method of manufacturing a silicon carbide semiconductor device includes, in order: polishing a silicon carbide semiconductor base body from a second main surface side thus forming unevenness on a second main surface; forming a thin metal film made of metal capable of forming a metal carbide on the second main surface of the silicon carbide semiconductor base body; irradiating a laser beam which falls within a visible region or within an infrared region to the thin metal film so as to heat the thin metal film thus forming a metal carbide on a boundary face between the silicon carbide semiconductor base body and the thin metal film; etching a metal containing byproduct layer possibly formed on a surface side of the metal carbide by a non-oxidizing chemical solution thus exposing a surface of the metal carbide; and forming a cathode electrode on the metal carbide.
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公开(公告)号：US09831316B2
公开(公告)日：2017-11-28
申请号：US15303730
申请日：2015-07-10
发明人： Tetsuto Inoue , Akihiko Sugai , Shunichi Nakamura
IPC分类号： H01L29/40 , H01L29/66 , H01L29/739 , H01L29/78 , H01L29/06 , H01L29/12 , H01L29/10 , H01L29/16
CPC分类号： H01L29/407 , H01L29/06 , H01L29/0634 , H01L29/0696 , H01L29/1095 , H01L29/12 , H01L29/1608 , H01L29/20 , H01L29/2003 , H01L29/401 , H01L29/404 , H01L29/408 , H01L29/42372 , H01L29/66068 , H01L29/739 , H01L29/7397 , H01L29/78 , H01L29/7804 , H01L29/7806 , H01L29/7811 , H01L29/7813
摘要： A semiconductor device includes an element portion and a gate pad portion on the same wide gap semiconductor substrate. The element portion includes a first trench structure having a plurality of first protective trenches and first buried layers formed deeper than gate trenches. The gate pad portion includes a second trench structure having a plurality of second protective trenches and second buried layers. The second trench structure is either one of a structure where the second trench structure includes: a p-type second semiconductor region and a second buried layer made of a conductor or a structure where the second trench structure includes a second buried layer formed of a metal layer which forms a Schottky contact. The second buried layer is electrically connected with the source electrode layer.
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公开(公告)号：US11437506B2
公开(公告)日：2022-09-06
申请号：US16763550
申请日：2017-11-13
发明人： Shunichi Nakamura
摘要： A wide gap semiconductor device has: a drift layer using wide gap semiconductor material being a first conductivity type; a well region being a second conductivity type and provided in the drift layer; a source region provided in the well region; a gate contact region provided in the well region and electrically connected to a gate pad; and a Zener diode region provided in the well region and provided between the source region and the gate contact region.
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公开(公告)号：US11264494B2
公开(公告)日：2022-03-01
申请号：US16763542
申请日：2017-11-13
发明人： Shunichi Nakamura
IPC分类号： H01L29/41 , H01L29/49 , H01L29/66 , H01L29/78 , H01L29/10 , H01L29/16 , H01L29/40 , H01L29/417
摘要： A wide gap semiconductor device has: a drift layer 12 using wide gap semiconductor material being a first conductivity type; a plurality of well regions 20 being a second conductivity type and formed in the drift layer 12; a polysilicon layer 150 provided on the well regions 20 and on the drift layer 12 between the well regions 20; an interlayer insulating film 65 provided on the polysilicon layer 150; a gate pad 120 provided on the interlayer insulating film 65; and a source pad 110 electrically connected to the polysilicon layer 150.
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公开(公告)号：US11195907B2
公开(公告)日：2021-12-07
申请号：US16963751
申请日：2018-02-13
IPC分类号： H01L29/06 , H01L29/16 , H01L29/872
摘要： A semiconductor device includes: a drift layer of a first conductivity type which is made of silicon carbide; a junction region formed on one main surface of the drift layer; a junction termination extended region of the drift layer, the junction termination extended region being formed outside the junction region when the one main surface is viewed in plan view, and the junction termination extended region containing an impurity of a second conductivity type opposite to the first conductivity type; and a guard ring region of the drift layer, the guard ring region being formed at a position overlapping the junction termination extended region when the one main surface is viewed in plan view, and the guard ring region containing the impurity of the second conductivity type with a concentration that is higher than that of the junction termination extended region, wherein in the junction termination extended region, the concentration of the impurity of the second conductivity type in a depth direction from the one main surface increases from the one main surface down to a first depth, and the concentration of the impurity of the second conductivity type at the one main surface is one tenth or less the concentration of the impurity of the second conductivity type at the first depth and is higher than a concentration of an impurity of the first conductivity type of the drift layer.
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公开(公告)号：US09640618B2
公开(公告)日：2017-05-02
申请号：US14787982
申请日：2014-09-24
发明人： Tetsuto Inoue , Akihiko Sugai , Shunichi Nakamura
IPC分类号： H01L29/16 , H01L29/78 , H01L29/12 , G06F17/50 , H01L23/535 , H01L29/06 , H01L29/423 , H01L29/66 , H01L21/02 , H01L21/768
CPC分类号： H01L29/1608 , G06F17/5068 , H01L21/02529 , H01L21/76895 , H01L23/535 , H01L29/0619 , H01L29/0623 , H01L29/0642 , H01L29/0661 , H01L29/0696 , H01L29/407 , H01L29/4236 , H01L29/42372 , H01L29/4238 , H01L29/66068 , H01L29/66666 , H01L29/66734 , H01L29/7397 , H01L29/7811 , H01L29/7813 , H01L29/7827
摘要： A silicon carbide semiconductor device includes a silicon carbide layer 32 of a first conductivity type, a silicon carbide layer 36 of a second conductivity type, a gate trench 20, a gate electrode 79 provided in the gate trench 20, and a protection trench 10 formed to a greater depth than the gate trench 20. A region in the horizontal direction that includes both the gate trench 20 and a protection trench 10 that surrounds only a part of the gate trench 20 in the horizontal direction is a cell region, and a region in the horizontal direction that includes a protection trench 10 and in which a gate pad 89 or a lead electrode connected to the gate pad 89 is disposed is a gate region.
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公开(公告)号：US11309415B2
公开(公告)日：2022-04-19
申请号：US16976731
申请日：2018-03-29
发明人： Shunichi Nakamura
IPC分类号： H01L29/78 , H01L23/522 , H01L27/088 , H01L27/08
摘要： A wide gap semiconductor device has: a first MOSFET region (M0) having a first gate electrode 10 and a first source region 30 provided in a first well region 20 made of a second conductivity type; a second MOSFET region (M1) provided below a gate pad 100 and having a second gate electrode 110 and a second source region 130 provided in a second well region 120 made of the second conductivity type; and a built-in diode region electrically connected to the second gate electrode 110. The second source region 130 of the second MOSFET region (M1) is electrically connected to the gate pad 100.
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公开(公告)号：US10600869B2
公开(公告)日：2020-03-24
申请号：US15314095
申请日：2015-09-18
发明人： Shunichi Nakamura , Akihiko Sugai , Tetsuto Inoue
IPC分类号： H01L31/0312 , H01L21/00 , H01L29/10 , H01L21/04 , H01L29/06 , H01L29/08 , H01L29/16 , H01L29/66 , H01L29/739 , H01L29/78
摘要： A silicon carbide semiconductor device includes: n type regions formed on a surface of the n− type epitaxial layer; p type body regions formed at positions deeper than the n type regions; p− type channel regions each reaching the p type body region; and n++ type source regions formed toward the p type body region from the front surface side of the epitaxial layer, and the p− type channel regions and the n++ type source regions are formed at a planar position where the n type region remains between the p− type channel region and the n++ type source region, and out of boundary surfaces which are formed between the p− type channel region and the n type regions, the boundary surface on an outer peripheral side is positioned inside an outer peripheral surface 116a of the p type body region as viewed in a plan view.
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公开(公告)号：US10510841B2
公开(公告)日：2019-12-17
申请号：US16388807
申请日：2019-04-18
发明人： Shunichi Nakamura , Akihiko Sugai , Tetsuto Inoue
IPC分类号： H01L21/00 , H01L31/0312 , H01L29/10 , H01L21/04 , H01L29/06 , H01L29/08 , H01L29/16 , H01L29/66 , H01L29/739 , H01L29/78
摘要： A silicon carbide semiconductor device includes: n type regions formed on a surface of the n− type epitaxial layer; p type body regions formed at positions deeper than the n type regions; p− type channel regions each reaching the p type body region; and n++ type source regions formed toward the p type body region from the front surface side of the epitaxial layer, and the p− type channel regions and the n++ type source regions are formed at a planar position where the n type region remains between the p− type channel region and the n++ type source region, and out of boundary surfaces which are formed between the p− type channel region and the n type regions, the boundary surface on an outer peripheral side is positioned inside an outer peripheral surface 116a of the p type body region as viewed in a plan view.
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