公开(公告)号：US20250022525A1

公开(公告)日：2025-01-16

申请号：US18510664

申请日：2023-11-16

Applicant: SK hynix Inc.

Inventor： Young Gyun KIM ,  Hye Lyoung LEE ,  Seung Gu JI ,  Dong Jae SHIN

IPC: G11C29/12 ,  G11C16/10 ,  G11C16/34

Abstract: A storage device includes a memory device and a controller. The memory device includes a plurality of memory regions. The controller is configured to perform a test operation on a target memory region among the memory regions when it is impossible to determine a second program standby time amount by which a second program operation remains as not performed on the target memory region after a first program operation is performed on the target memory region, and configured to control, according to a result of the test operation, the memory device to perform an adjusted second program operation on the target memory region.

公开(公告)号：US20180190356A1

公开(公告)日：2018-07-05

申请号：US15651477

申请日：2017-07-17

Applicant: SK hynix Inc.

Inventor： Hye Lyoung LEE ,  Bong Hoon LEE ,  Chan LIM

IPC: G11C16/10 ,  G11C16/08 ,  G11C16/16 ,  G11C16/26 ,  G11C16/30 ,  G11C16/34

CPC classification number: G11C16/102 ,  G11C11/221 ,  G11C11/5628 ,  G11C16/08 ,  G11C16/16 ,  G11C16/26 ,  G11C16/30 ,  G11C16/3459 ,  G11C16/3495 ,  G11C2211/5621 ,  G11C2211/5642

Abstract: Provided herein may be a semiconductor memory device and a method of operating the same. The semiconductor memory device may include a plurality of pages each including a plurality of memory cells, peripheral circuits configured to perform a program operation of a selected page among the plurality of pages and a control logic configured to control the peripheral circuits such that a main program operation is performed on the selected page and, when the main program operation is completed, a compensation program operation is performed on memory cells having lower threshold voltage retention characteristics compared to remaining memory cells, among the memory cells included in the selected page.

公开(公告)号：US20230420056A1

公开(公告)日：2023-12-28

申请号：US17983066

申请日：2022-11-08

Applicant: SK hynix Inc.

Inventor： Hye Lyoung LEE ,  Tae Un YOUN ,  Kwang Min LIM

IPC: G11C16/16 ,  G11C16/08 ,  G11C16/04 ,  G11C16/32

CPC classification number: G11C16/16 ,  G11C16/08 ,  G11C16/0433 ,  G11C16/32

Abstract: The present technology relates to a memory device and a method of operating the memory device. The memory device includes a memory block including a plurality of memory cells corresponding to a plurality of word line groups, a source line driver configured to apply an erase voltage to a source line of the memory block during an erase operation, a voltage generation circuit configured to apply an operation voltage increasing from a first operation voltage to a second operation voltage to the plurality of word line groups during the erase operation, and a control logic configured to control the source line driver and the voltage generation circuit to perform a suspend operation of stopping the erase operation.

公开(公告)号：US20150221374A1

公开(公告)日：2015-08-06

申请号：US14326047

申请日：2014-07-08

Applicant: SK hynix Inc.

Inventor： Hye Lyoung LEE

IPC: G11C16/10 ,  G11C16/04

CPC classification number: G11C16/10 ,  G11C16/0483

Abstract: A semiconductor device includes memory cells electrically coupled to word lines. In addition, the semiconductor device includes an operation circuit performing a program loop on memory cells electrically coupled to a selected word line. Further, the operation circuit increases a program permission voltage applied to a bit line of a program target memory cell when a number of times in which the program loop is performed exceeds a reference number.

Abstract translation: 半导体器件包括电耦合到字线的存储单元。 此外，半导体器件包括对与所选字线电耦合的存储器单元执行程序循环的操作电路。 此外，当执行程序循环的次数超过参考数时，操作电路增加了施加到程序目标存储单元的位线的程序允许电压。

公开(公告)号：US20190333593A1

公开(公告)日：2019-10-31

申请号：US16510508

申请日：2019-07-12

Applicant: SK hynix Inc.

Inventor： Hye Lyoung LEE ,  Bong Hoon LEE ,  Chan LIM

IPC: G11C16/34 ,  G11C16/04 ,  G11C16/10 ,  G11C16/30 ,  G11C11/56 ,  G11C16/26

Abstract: Provided herein may be a semiconductor memory device and a method of operating the same. The semiconductor memory device may include peripheral circuits configured to perform a verify operation on selected memory cells by applying a verify voltage to a word line, and perform a compensation program operation on the selected memory cells by applying a compensation program voltage to the word line; and a control logic configured to control the peripheral circuits such that the compensation program operation is performed by applying the compensation program voltage to the selected memory cells to be programmed to a selected threshold voltage distribution among the threshold voltage distributions other than a highest threshold voltage distribution, wherein the compensation program voltage has a positive voltage lower than the main program voltage most recently applied to the word line.

公开(公告)号：US20160217859A1

公开(公告)日：2016-07-28

申请号：US15088605

申请日：2016-04-01

Applicant: SK hynix Inc.

Inventor： Hye Lyoung LEE

IPC: G11C16/10

CPC classification number: G11C16/10 ,  G11C16/0483 ,  G11C16/3459

Abstract: A semiconductor device includes a memory block including memory cells coupled to word lines, and an operation circuit configured to perform a program loop on memory cells coupled a selected word line, wherein the operation circuit is configured to change a program permission voltage applied to a bit line of a program target memory cell when a number of times the program loop is performed exceeds a reference number.

Abstract translation: 半导体器件包括存储块，其包括耦合到字线的存储器单元，以及操作电路，被配置为对耦合所选字线的存储器单元执行编程环路，其中所述操作电路被配置为改变施加到位的程序允许电压 执行程序循环的次数超过参考号时的程序目标存储单元的行。