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    SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME
    1.
    发明申请
    SEMICONDUCTOR DEVICE AND METHOD OF OPERATING THE SAME 有权

    公开(公告)号：US20210397362A1

    公开(公告)日：2021-12-23

    申请号：US17083500

    申请日：2020-10-29

    Applicant: SK hynix Inc.

    Inventor： Young Gyun KIM ,  Ki Woong LEE ,  Sang Jin LEE

    IPC: G06F3/06

    Abstract: The present technology relates to a semiconductor device and a method of operating the same. The semiconductor device includes a sensing voltage generator configured to generate a temperature voltage having a voltage level determined according to an internal temperature of the semiconductor device and a reference voltage having a constant voltage level, a code generator configured to generate a temporary code including a sensing code value corresponding to the internal temperature and a boundary value indicating whether the internal temperature is included in a boundary portion associated with at least one temperature range corresponding to the sensing code value based on the temperature voltage and the reference voltage, and a code correction component configured to generate a correction code for generating an operation voltage of the semiconductor device by correcting the temporary code, based on the temporary code and a previously generated correction code.

    SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF
    2.
    发明申请
    SEMICONDUCTOR MEMORY DEVICE AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20200057580A1

    公开(公告)日：2020-02-20

    申请号：US16298604

    申请日：2019-03-11

    Applicant: SK hynix Inc.

    Inventor： Young Gyun KIM ,  Hyun Woo LEE

    IPC: G06F3/06 ,  G11C16/10 ,  G11C16/14

    Abstract: A semiconductor memory device includes a memory cell array, a peripheral circuit, a control logic, and a temperature sensor. The memory cell array includes a plurality of memory cells. The peripheral circuit performs an operation on the memory cell array. The control logic controls an operation of the peripheral circuit, and generates a ready-busy signal representing whether the operation of the peripheral circuit is completed. The temperature sensor measures a temperature of the semiconductor memory device. The control logic generates the ready-busy signal, based on the temperature.

    STORAGE DEVICE AND OPERATING METHOD OF CONTROLLER OF STORAGE DEVICE
    3.
    发明申请
    STORAGE DEVICE AND OPERATING METHOD OF CONTROLLER OF STORAGE DEVICE 有权

    公开(公告)号：US20250022525A1

    公开(公告)日：2025-01-16

    申请号：US18510664

    申请日：2023-11-16

    Applicant: SK hynix Inc.

    Inventor： Young Gyun KIM ,  Hye Lyoung LEE ,  Seung Gu JI ,  Dong Jae SHIN

    IPC: G11C29/12 ,  G11C16/10 ,  G11C16/34

    Abstract: A storage device includes a memory device and a controller. The memory device includes a plurality of memory regions. The controller is configured to perform a test operation on a target memory region among the memory regions when it is impossible to determine a second program standby time amount by which a second program operation remains as not performed on the target memory region after a first program operation is performed on the target memory region, and configured to control, according to a result of the test operation, the memory device to perform an adjusted second program operation on the target memory region.

    MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATING METHOD THEREOF
    4.
    发明申请
    MEMORY SYSTEM, MEMORY CONTROLLER, AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20200042245A1

    公开(公告)日：2020-02-06

    申请号：US16299272

    申请日：2019-03-12

    Applicant: SK hynix Inc.

    Inventor： Hyun Woo LEE ,  Young Gyun KIM

    IPC: G06F3/06 ,  H03K19/21 ,  G11C16/04 ,  G11C16/26 ,  G06F11/10 ,  G11C29/52

    Abstract: A memory system includes a memory device and a memory controller. The memory device includes a plurality of memory cells. The memory controller controls the memory device to perform a plurality of read operations on memory cells included in a selected physical page among the plurality of memory cells. The memory controller calculates an inverted bit number representing different bit values, based on a plurality of read data received from the memory device. The memory controller performs a read reclaim operation on the selected physical page, based on the inverted bit number.

    MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF OPERATING MEMORY SYSTEM
    5.
    发明申请
    MEMORY SYSTEM, MEMORY CONTROLLER, AND METHOD OF OPERATING MEMORY SYSTEM 有权

    公开(公告)号：US20210407607A1

    公开(公告)日：2021-12-30

    申请号：US17155655

    申请日：2021-01-22

    Applicant: SK hynix Inc.

    Inventor： Ju Yong KIM ,  Young Gyun KIM ,  Ki Woong LEE

    IPC: G11C16/34 ,  G11C16/10 ,  G11C16/26 ,  G11C16/30

    Abstract: A memory system is provided to include a memory device and a memory controller configured to control the memory device. The memory device includes a first data latch storing information about a state of the memory cell and is configured to: execute a first verification operation and a second verification operation on the memory cell in response to receiving, from the memory controller, a suspend command to suspend a program operation being performed on the memory cell; store, in the first data latch, a temporary value obtained based on a result value of the first verification operation and a result value of the second verification operation; and execute, a resumption command to resume the program operation, a third verification operation, and restore the result value of the first verification operation and the result value of the second verification operation.

    STORAGE DEVICE AND OPERATING METHOD THEREOF
    6.
    发明申请
    STORAGE DEVICE AND OPERATING METHOD THEREOF 审中-公开

    公开(公告)号：US20200225859A1

    公开(公告)日：2020-07-16

    申请号：US16549437

    申请日：2019-08-23

    Applicant: SK hynix Inc.

    Inventor： Hyun Woo LEE ,  Young Gyun KIM

    IPC: G06F3/06

    Abstract: A storage device having an improved operation speed includes a memory controller for controlling a memory device. The memory controller includes a parameter data generator for generating parameter data for changing a parameter value related to an operation of the memory device, and a parameter controller for outputting the parameter data. The parameter data includes an error protection field associated with the parameter value.

    SEMICONDUCTOR APPARATUS AND OPERATING METHOD THEREOF
    7.
    发明申请
    SEMICONDUCTOR APPARATUS AND OPERATING METHOD THEREOF 审中-公开
    半导体装置及其工作方法

    公开(公告)号：US20160293259A1

    公开(公告)日：2016-10-06

    申请号：US14815078

    申请日：2015-07-31

    Applicant: SK Hynix Inc.

    Inventor： Young Gyun KIM

    IPC: G11C16/12 ,  G11C16/34 ,  G11C16/26

    CPC classification number: G11C16/12 ,  G11C11/5628 ,  G11C13/0028 ,  G11C13/0064 ,  G11C13/0069 ,  G11C16/08 ,  G11C16/10 ,  G11C16/26 ,  G11C16/3459 ,  G11C2013/0066 ,  G11C2211/5621

    Abstract: A nonvolatile memory apparatus includes a plurality of memory cells coupled to a word line and respectively coupled to different bit lines, and a control block configured to apply one or more program voltages to the word line in a program loop, and increase the one or more program voltages in increments each time of the program loop is repeated, wherein at least one of the increments is different.

    Abstract translation: 非易失性存储装置包括耦合到字线并分别耦合到不同位线的多个存储单元，以及被配置为在程序循环中将一个或多个编程电压施加到字线的控制块，并且增加一个或多个 重复每次程序循环的增量的程序电压，其中至少一个增量是不同的。

    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME
    9.
    发明申请
    MEMORY SYSTEM AND METHOD OF OPERATING THE SAME 有权
    存储器系统及其操作方法

    公开(公告)号：US20160155494A1

    公开(公告)日：2016-06-02

    申请号：US14709114

    申请日：2015-05-11

    Applicant: SK hynix Inc.

    Inventor： Young Gyun KIM

    IPC: G11C11/56

    CPC classification number: G11C11/5628 ,  G11C7/1021 ,  G11C8/12 ,  G11C11/5642 ,  G11C16/10

    Abstract: A memory system and a method of operating the same are provided. The method includes reading least significant bit (LSB) data of a first physical page based on a first pre-read voltage and performing a most significant bit (MSB) program based on the LSB data of the first physical page when the MSB program is performed on the first physical page, defining a management area by comparing the number of error bits included in MSB data of the first physical page with a first threshold value, preforming an LSB program on a second physical page of the management area, reading LSB data of the second physical page based on a second pre-read voltage, which is lower than the first pre-read voltage, and performing the MSB program on the second physical page based on the LSB data of the second physical page.

    Abstract translation: 提供了一种存储系统及其操作方法。 该方法包括基于第一预读电压读取第一物理页的最低有效位（LSB）数据，并且当执行MSB程序时，基于第一物理页的LSB数据执行最高有效位（MSB）程序 在第一物理页面上，通过将包含在第一物理页面的MSB数据中的错误位数与第一阈值进行比较来定义管理区域，在管理区域的第二物理页面上执行LSB程序，读取LSB数据 所述第二物理页基于低于所述第一预读电压的第二预读电压，以及基于所述第二物理页的LSB数据在所述第二物理页上执行所述MSB程序。

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