公开(公告)号：US09030907B2

公开(公告)日：2015-05-12

申请号：US14106809

申请日：2013-12-15

Applicant: SK Hynix Inc.

Inventor： Kwang-Jin Na ,  Tae-Wook Kang

IPC: G11C8/00 ,  G11C8/18

CPC classification number: G11C8/18 ,  G11C29/023 ,  G11C29/028

Abstract: A semiconductor device includes a first internal clock generation unit suitable for generating a first internal clock for synchronizing a first signal in response to a first external clock; a second internal clock generation unit suitable for generating a second internal clock for synchronizing a second signal in response to a second external clock; and a delay amount information provision unit suitable for providing delay amount information corresponding to a phase difference between the first internal clock and the second internal clock to an external device.

Abstract translation: 半导体器件包括：第一内部时钟生成单元，适于产生用于响应于第一外部时钟同步第一信号的第一内部时钟; 第二内部时钟生成单元，适于产生用于响应于第二外部时钟同步第二信号的第二内部时钟; 以及延迟量信息提供单元，其适于将对应于第一内部时钟和第二内部时钟之间的相位差的延迟量信息提供给外部设备。

公开(公告)号：US09793901B2

公开(公告)日：2017-10-17

申请号：US14994291

申请日：2016-01-13

Applicant: SK hynix Inc.

Inventor： Han-Kyu Chi ,  Kyung-Hoon Kim ,  Myeong-Jae Park ,  Taek-Sang Song ,  Tae-Wook Kang

IPC: H04L7/00 ,  H03L7/08 ,  H03K5/135 ,  H03L7/10 ,  H04L7/033 ,  H03K5/00

CPC classification number: H03L7/0807 ,  G11C7/222 ,  G11C11/4076 ,  H03K5/135 ,  H03K2005/00019 ,  H03L7/081 ,  H03L7/0812 ,  H03L7/105 ,  H03L2207/06 ,  H04L7/0037 ,  H04L7/0331

Abstract: An integrated circuit may include: a phase detector suitable for generating a delay control signal by comparing the phases of first and second clock signals to first and second target positions, a variable delay unit suitable for shifting the first and second clock signals to the first and second target positions, respectively, in response to the delay control signal, and a position controller suitable for varying the first and second target positions according to an operation mode.

公开(公告)号：US09077438B2

公开(公告)日：2015-07-07

申请号：US14077933

申请日：2013-11-12

Applicant: SK hynix Inc.

Inventor： Tae-Wook Kang ,  Kwang-Jin Na

IPC: H04B3/46

CPC classification number: H04B3/46 ,  H03L7/0812 ,  H03L7/0814

Abstract: A noise detection circuit includes a first delay unit suitable for delaying a periodic wave to output a delayed periodic wave, a first divider unit suitable for dividing the delayed periodic wave to output a first periodic wave, a second divider unit suitable for dividing the periodic wave to output a divided periodic wave, a second delay unit suitable for delaying the divided periodic wave to output a second periodic wave, and a detection unit suitable for comparing the first periodic wave with the second periodic wave and outputting a noise detection signal.

Abstract translation: 噪声检测电路包括适于延迟周期波以输出延迟的周期波的第一延迟单元，适于分割延迟的周期波以输出第一周期波的第一分频器单元，适于分频周期波的第二分频器单元 输出分频周期波，适于延迟分频周期波以输出第二周期波的第二延迟单元，以及适合于将第一周期波与第二周期波进行比较并输出噪声检测信号的检测单元。