WRITE DRIVER, RESISTANCE VARIABLE MEMORY APPARATUS INCLUDING THE SAME, AND OPERATION METHOD
    1.
    发明申请
    WRITE DRIVER, RESISTANCE VARIABLE MEMORY APPARATUS INCLUDING THE SAME, AND OPERATION METHOD 有权
    写入驱动器,电阻可变存储器装置及其操作方法

    公开(公告)号:US20160042788A1

    公开(公告)日:2016-02-11

    申请号:US14515774

    申请日:2014-10-16

    Applicant: SK hynix Inc.

    Abstract: A write driver is configured to determine a magnitude and an application time of a pre-emphasis current pulse in response to control codes generated according to parasitic components on a path from a write driver to a program target cell and a resistance value of the program target cell, and supply a preset program current to a memory circuit block by adding a pre-emphasis current to the preset program current in a program mode.

    Abstract translation: 写驱动器被配置为响应于根据从写驱动程序到程序目标单元的路径上的寄生分量产生的控制代码和程序目标的电阻值来确定预加重电流脉冲的幅度和施加时间 并且通过在程序模式下将预加重电流加到预设的程序电流,将预设的程序电流提供给存储器电路块。

    TEMPERATURE SENSOR AND ELECTRONIC SYSTEM FOR EXECUTING TRIMMING OPERATIONS

    公开(公告)号:US20240302220A1

    公开(公告)日:2024-09-12

    申请号:US18330471

    申请日:2023-06-07

    Applicant: SK hynix Inc.

    CPC classification number: G01K7/183 G01K7/20

    Abstract: A temperature sensor includes a first trimming resistor having a first resistance value that is trimmed based on a first trimming code and configured to adjust a gate voltage, a MOS transistor turned on based on the gate voltage and configured to drive a variable voltage having a voltage level set for each sensing temperature, and a second trimming resistor connected to the MOS transistor, the second trimming resistor having a second resistance value that is trimmed based on a second trimming code.

    SEMICONDUCTOR MEMORY APPARATUS
    4.
    发明申请
    SEMICONDUCTOR MEMORY APPARATUS 有权
    半导体存储器

    公开(公告)号:US20150058566A1

    公开(公告)日:2015-02-26

    申请号:US14081765

    申请日:2013-11-15

    Applicant: SK hynix Inc.

    Abstract: A semiconductor memory apparatus includes a column address decoding unit configured to decode a column address and generate a column select signal; a row address decoding unit configured to decode a row address and generate a word line select signal; a driving driver unit configured to provide different voltages to a plurality of resistive memory elements in response to the column select signal; a sink current control unit configured to generate a plurality of sink voltages with different voltage levels in response to the word line select signal; and a plurality of current sink units configured to flow current from the plurality of respective resistive memory elements to a ground terminal in response to the plurality of sink voltages.

    Abstract translation: 一种半导体存储装置,包括列地址解码单元,被配置为对列地址进行解码并生成列选择信号; 行地址解码单元,被配置为对行地址进行解码并生成字线选择信号; 驱动驱动器单元,被配置为响应于列选择信号向多个电阻存储器元件提供不同的电压; 宿电流控制单元,被配置为响应于所述字线选择信号而产生具有不同电压电平的多个宿电压; 以及多个电流吸收单元,被配置为响应于所述多个吸收电压而将电流从所述多个相应的电阻性存储器元件流动到接地端子。

    ELECTRONIC DEVICES RELATED TO COMPENSATION OF MONITORING SIGNALS

    公开(公告)号:US20240304272A1

    公开(公告)日:2024-09-12

    申请号:US18330117

    申请日:2023-06-06

    Applicant: SK hynix Inc.

    CPC classification number: G11C29/46 G11C7/02 G11C29/12005

    Abstract: An electronic device includes a monitoring signal generation circuit configured to receive an internal voltage to generate a monitoring signal, based on a voltage selection signal in a test mode, and an internal voltage drive circuit configured to receive the internal voltage and monitoring signal from the monitoring signal generation circuit and drive the internal voltage to compensate for the monitoring signal when the monitoring signal is distorted according to a leakage current in the test mode.

    CIRCUIT FOR GENERATING VOLTAGE
    6.
    发明申请

    公开(公告)号:US20190305760A1

    公开(公告)日:2019-10-03

    申请号:US16160733

    申请日:2018-10-15

    Applicant: SK hynix Inc.

    Abstract: A voltage generation circuit is provided. The voltage generation circuit may include an enable signal generator, a voltage controller, and a voltage driver. The enable signal generator may generate an enable signal based on a test signal and an active signal. During activation of the enable signal, the voltage controller may compare a reference voltage with a feedback voltage, amplify the result of comparison, and generate a drive voltage. The voltage driver may output an internal voltage by driving the drive voltage, and generate the feedback voltage corresponding to the internal voltage. The feedback voltage may be pulled down during activation of the enable signal.

    SEMICONDUCTOR DEVICE FOR GENERATING AN INTERNAL VOLTAGE

    公开(公告)号:US20240345765A1

    公开(公告)日:2024-10-17

    申请号:US18351855

    申请日:2023-07-13

    Applicant: SK hynix Inc.

    CPC classification number: G06F3/0655 G06F3/0604 G06F3/0679 G11C11/4074

    Abstract: A semiconductor device includes an internal voltage control circuit including an amplifier circuit and a plurality of drivers. The internal voltage control circuit is configured to drive an internal voltage through the sharing of the amplifier circuit and a driver that is activated, among the plurality of drivers, after the start of a standby operation and an active operation. The semiconductor device also includes a core circuit including a plurality of banks. The core circuit is configured to perform an operation of a bank that is activated, among the plurality of banks, by receiving the internal voltage.

    WORD LINE DRIVER CIRCUIT AND RESISTANCE VARIABLE MEMORY APPARATUS HAVING THE SAME
    10.
    发明申请
    WORD LINE DRIVER CIRCUIT AND RESISTANCE VARIABLE MEMORY APPARATUS HAVING THE SAME 有权
    字线驱动电路和电阻可变存储器具

    公开(公告)号:US20150364174A1

    公开(公告)日:2015-12-17

    申请号:US14486432

    申请日:2014-09-15

    Applicant: SK hynix Inc.

    CPC classification number: G11C8/08 G11C8/14 G11C11/4085 G11C13/0028

    Abstract: A world line driver circuit according to an embodiment includes a driving unit configured to output a sub word line driving signal in response to a word line select signal and a main word line driving signal, a transmission unit configured to transmit the sub word line driving signal to a word line in response to a first enable signal, and a precharge unit configured to precharge a potential of the word line.

    Abstract translation: 根据实施例的世界线驱动器电路包括:驱动单元,被配置为响应于字线选择信号和主字线驱动信号输出子字线驱动信号;发送单元,被配置为发送子字线驱动信号 响应于第一使能信号到字线,以及预充电单元,被配置为对字线的电位进行预充电。

Patent Agency Ranking