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公开(公告)号:US10152079B2
公开(公告)日:2018-12-11
申请号:US16007403
申请日:2018-06-13
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Mario Chiricosta
Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
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公开(公告)号:US20180299920A1
公开(公告)日:2018-10-18
申请号:US16007403
申请日:2018-06-13
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Mario Chiricosta
Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference comprising a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
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公开(公告)号:US11817838B2
公开(公告)日:2023-11-14
申请号:US17687079
申请日:2022-03-04
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Michele Vaiana
IPC: H03F3/45
CPC classification number: H03F3/45753 , H03F2200/228 , H03F2200/331 , H03F2200/447 , H03F2200/471 , H03F2203/45441 , H03F2203/45514
Abstract: An electronic amplification-interface circuit includes a differential-current reading circuit having a first input terminal and a second input terminal. The differential-current reading circuit includes a continuous-time sigma-delta conversion circuit formed by an integrator-and-adder module generating an output signal that is coupled to an input of a multilevel-quantizer circuit configured to output a multilevel quantized signal. The integrator-and-adder module includes a differential current-integrator circuit configured to output a voltage proportional to an integral of a difference between currents received at the first and second input terminals. A digital-to-analog converter, driven by a respective reference current, receives and converts the multilevel quantized signal into a differential analog feedback signal. The integrator-and-adder module adds the differential analog feedback signal to the differential signal formed at the first and second input terminals.
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公开(公告)号:US11561663B2
公开(公告)日:2023-01-24
申请号:US17038546
申请日:2020-09-30
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Angelo Recchia , Antonio Cicero , Pierpaolo Lombardo , Michele Vaiana
Abstract: A touchscreen resistive sensor includes a network of resistive sensor branches coupled to a number of sensor nodes arranged at touch locations of the touchscreen. A test sequence is performed by sequentially applying to each sensor node a reference voltage level, jointly coupling to a common line the other nodes, sensing a voltage value at the common line, and declaring a short circuit condition as a result of the voltage value sensed at the common line reaching a short circuit threshold. A current value level flowing at the sensor node to which the reference voltage level is applied is sensed and a malfunction of the resistive sensor branch coupled with the sensor node to which a reference voltage level is applied is generated as a result of the current value sensed at the sensor node reaching an upper threshold or lower threshold.
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公开(公告)号:US10794772B2
公开(公告)日:2020-10-06
申请号:US15957999
申请日:2018-04-20
Applicant: STMicroelectronics S.r.l.
Inventor: Michele Vaiana , Paolo Pesenti , Mario Chiricosta , Calogero Marco Ippolito , Mario Maiore
Abstract: A circuit includes a first input terminal, a second input terminal, a third input terminal and an output terminal. A first summation node adds signals at the first and third input terminals. A second summation node subtracts signals at the second and third input terminals. A selector selects between the added signals and subtracted signals in response to a selection signal. The output of the selector is integrated to generate an integrated signal. The integrated signal is compared by a comparator to a threshold, the comparator generating an output signal at the output terminal having a first level and a second level. Feedback of the output signal produces the selection signal causing the selector to select the added signals in response to the first level of the output signal and causing the selector to select the subtracted signals in response to the second level of the output signal.
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公开(公告)号:US10678289B2
公开(公告)日:2020-06-09
申请号:US16183101
申请日:2018-11-07
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Mario Chiricosta
Abstract: A circuit for generating a bandgap voltage includes a circuit module for generation of a base-emitter voltage difference formed by a pair of PNP bipolar substrate transistors which identify a first current path and a second current path. A first current mirror of an n type is connected between the first and second branches and is further connected via a resistance for adjustment of the bandgap voltage to the second bipolar transistor. A second current mirror of a p type is connected between the first and second branches, and connected so that the current mirrors repeat current of each other. In operation to generate the bandgap voltage, current flows from the supply voltage to ground only through said the first and second bipolar substrate transistors.
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公开(公告)号:US11709185B2
公开(公告)日:2023-07-25
申请号:US17670858
申请日:2022-02-14
Applicant: STMicroelectronics S.r.l.
Inventor: Michele Vaiana , Calogero Marco Ippolito , Angelo Recchia , Antonio Cicero , Pierpaolo Lombardo
CPC classification number: G01R19/0038 , G01R19/0069 , G05F3/08 , H03B5/04 , H03F1/0205 , H03F3/4565
Abstract: An amplification interface includes first and second differential input terminals, first and second differential output terminals providing first and second output voltages defining a differential output signal, and first and second analog integrators coupled between the first and second differential input terminals and the first and second differential output terminals, the first and second analog integrators being resettable by a reset signal. A control circuit generates the reset signal such that the first and second analog integrators are periodically reset during a reset interval and activated during a measurement interval, receives a control signal indicative of offsets in the measurement sensor current and the reference sensor current, and generates a drive signal as a function of the control signal. First and second current generators coupled first and second compensation circuits to the first and second differential input terminals as a function of a drive signal.
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公开(公告)号:US10809862B2
公开(公告)日:2020-10-20
申请号:US16523302
申请日:2019-07-26
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Angelo Recchia , Antonio Cicero , Pierpaolo Lombardo , Michele Vaiana
Abstract: A touchscreen resistive sensor includes a network of resistive sensor branches coupled to a number of sensor nodes arranged at touch locations of the touchscreen. A test sequence is performed by sequentially applying to each sensor node a reference voltage level, jointly coupling to a common line the other nodes, sensing a voltage value at the common line, and declaring a short circuit condition as a result of the voltage value sensed at the common line reaching a short circuit threshold. A current value level flowing at the sensor node to which the reference voltage level is applied is sensed and a malfunction of the resistive sensor branch coupled with the sensor node to which a reference voltage level is applied is generated as a result of the current value sensed at the sensor node reaching an upper threshold or lower threshold.
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公开(公告)号:US09540229B2
公开(公告)日:2017-01-10
申请号:US14962945
申请日:2015-12-08
Applicant: STMICROELECTRONICS S.R.L.
Inventor: Giuseppe Bruno , Sebastiano Conti , Mario Chiricosta , Michele Vaiana , Calogero Marco Ippolito , Mario Maiore , Daniele Casella
IPC: B81B7/00
CPC classification number: B81B7/007 , B81B7/02 , B81B2201/0264 , B81B2201/0292 , B81B2207/094 , G01L19/0092 , G01N27/223 , H01L23/3121 , H01L2224/32145 , H01L2224/48091 , H01L2224/73265 , H01L2924/181 , H01L2924/00012 , H01L2924/00014
Abstract: A packaged sensor assembly includes: a packaging structure, having at least one opening; a humidity sensor and a pressure sensor, which are housed inside the packaging structure and communicate fluidically with the outside through the opening, and a control circuit, operatively coupled to the humidity sensor and to the pressure sensor; wherein the humidity sensor and the control circuit are integrated in a first chip, and the pressure sensor is integrated in a second chip distinct from the first chip and bonded to the first chip.
Abstract translation: 包装传感器组件包括:具有至少一个开口的包装结构; 湿度传感器和压力传感器,其容纳在包装结构内并通过开口与外部流体连通;以及控制电路,可操作地耦合到湿度传感器和压力传感器; 其中所述湿度传感器和所述控制电路集成在第一芯片中,并且所述压力传感器集成在与所述第一芯片不同的第二芯片中并且被结合到所述第一芯片。
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10.
公开(公告)号:US09231597B2
公开(公告)日:2016-01-05
申请号:US14261283
申请日:2014-04-24
Applicant: STMicroelectronics S.r.l.
Inventor: Calogero Marco Ippolito , Mario Chiricosta
Abstract: A calibration circuit for a DCO includes a signal-conditioning module configured for (i) receiving at input an oscillating signal generated by the DCO and a reference signal, both designed to oscillate between a high logic value (“1”) and a low logic value (“0”), and (ii) detecting a respective first and second stable logic value of the reference signal and of the oscillating signal; and a period-to-voltage converter module coupled to the signal-conditioning module and configured for (iii) generating a difference signal identifying a difference between the period of the reference signal and the period of the oscillating signal, and (iv) controlling, on the basis of the difference signal, the DCO so as to conform the duration of the period of the oscillating signal to the duration of the period of the reference signal. Likewise described is a calibration method implemented by the calibration circuit.
Abstract translation: 用于DCO的校准电路包括信号调节模块,其被配置用于(i)在输入端接收由DCO产生的振荡信号和参考信号,两者被设计为在高逻辑值(“1”)和低逻辑 值(“0”),和(ii)检测参考信号和振荡信号的相应的第一和第二稳定逻辑值; 以及周期电压转换器模块,其耦合到所述信号调节模块并且被配置用于(iii)产生识别所述参考信号的周期与所述振荡信号的周期之间的差的差信号,以及(iv) 基于差分信号,DCO使得将振荡信号的周期的持续时间与参考信号的周期的持续时间相一致。 同样描述了由校准电路实现的校准方法。
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