公开(公告)号：US08895370B2

公开(公告)日：2014-11-25

申请号：US14042041

申请日：2013-09-30

Applicant: STMicroelectronics S.R.L.

Inventor： Ferruccio Frisina ,  Giuseppe Ferla ,  Angelo Magri′

IPC: H01L21/332 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78 ,  H01L29/417 ,  H01L29/861 ,  H01L29/732 ,  H01L29/739 ,  H01L21/265 ,  H01L29/08

CPC classification number: H01L29/66666 ,  H01L21/26586 ,  H01L29/0692 ,  H01L29/0696 ,  H01L29/0878 ,  H01L29/417 ,  H01L29/41708 ,  H01L29/41716 ,  H01L29/41741 ,  H01L29/41766 ,  H01L29/66128 ,  H01L29/66272 ,  H01L29/66333 ,  H01L29/66712 ,  H01L29/7322 ,  H01L29/7398 ,  H01L29/7809 ,  H01L29/8611

Abstract: A vertical conduction power device includes respective gate, source and drain areas formed in an epitaxial layer on a semiconductor substrate. The respective gate, source and drain metallizations are formed by a first metallization level. The gate, source and drain terminals are formed by a second metallization level. The device is configured as a set of modular areas extending parallel to each other. Each modular area has a rectangular elongate source area perimetrically surrounded by a gate area, and a drain area defined by first and second regions. The first regions of the drain extend parallel to one another and separate adjacent modular areas. The second regions of the drain area extend parallel to one another and contact ends of the first regions of the drain area.

Abstract translation: 垂直导通功率器件包括形成在半导体衬底上的外延层中的相应的栅极，源极和漏极区域。 相应的栅极，源极和漏极金属化由第一金属化层形成。 栅极，源极和漏极端子由第二金属化层形成。 该设备被配置为彼此平行延伸的一组模块区域。 每个模块区域具有由栅极区域周边包围的矩形细长源区域和由第一和第二区域限定的漏极区域。 排水的第一区域彼此平行延伸并分开相邻的模块区域。 漏极区域的第二区域彼此平行延伸并且与漏极区域的第一区域的端部接触。