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8 条记录 (耗时 0.023 秒)

    Technique to assess timing delay by use of layout quality analyzer comparison
    2.
    发明授权
    Technique to assess timing delay by use of layout quality analyzer comparison 失效
    通过使用布局质量分析仪比较来评估定时延迟的技术

    公开(公告)号：US06877147B2

    公开(公告)日：2005-04-05

    申请号：US10200365

    申请日：2002-07-22

    申请人： David A. Kidd ,  Nathan D. Dias ,  Matthew J. Page

    发明人： David A. Kidd ,  Nathan D. Dias ,  Matthew J. Page

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5077

    摘要： In one embodiment, a computer readable medium comprises at least first instructions and second instructions. The first instructions, when executed, compute a first plurality of routes. Each route of the first plurality of routes corresponds to a respective net of a plurality of nets in an integrated circuit layout, and represents a theoretically optimal route of the respective net according to a graph theory based algorithm. The second instructions, when executed, compare each of the first plurality of routes to a corresponding route of a current plurality of routes, each of the current plurality of routes corresponding to the respective net of the plurality of nets and currently existing in the integrated circuit layout. A method is also contemplated.

    摘要翻译： 在一个实施例中，计算机可读介质至少包括第一指令和第二指令。 第一指令在执行时计算第一组多个路由。 第一多个路线的每个路线对应于集成电路布局中的多个网络的相应网络，并且根据基于图论的算法表示相应网络的理论上最佳的路由。 所述第二指令在执行时将所述第一多个路由中的每一个与当前多个路由的对应路由进行比较，所述多个路由中的每一条路由对应于所述多个网络的相应网络，并且当前存在于所述集成电路中 布局。 也考虑了一种方法。

    Process for converting polymers by contacting same with particulate material suspended in a toroidal shape
    3.
    发明授权
    Process for converting polymers by contacting same with particulate material suspended in a toroidal shape 失效
    通过使聚合物与悬浮在环形形状中的颗粒材料接触来转化聚合物的方法

    公开(公告)号：US5354930A

    公开(公告)日：1994-10-11

    申请号：US76233

    申请日：1993-06-11

    申请人： Martin P. Atkins ,  David A. Kidd

    发明人： Martin P. Atkins ,  David A. Kidd

    IPC分类号： C08F8/50 ,  C08J11/10 ,  C10G1/10 ,  C07C1/00 ,  C07C4/00

    CPC分类号： C10G1/10

    摘要： This invention relates to a method of cracking polymers, especially waste hydrocarbon polymers to produce products of lower molecular weight. The process comprises feeding the polymer into a processing chamber or circular-cross section which chamber also has a bed of particulate material maintained in suspension and in toroidal shape by a hot gas introduced into said chamber so that the polymer intermingles with the particulate materials of the bed and is cracked into products of lower molecular weight. The invention is useful for converting polymeric wastes into products of commercial value such as e.g. waxes, lubricants and monomeric olefins at the same time reducing environmental pollution.

    摘要翻译： 本发明涉及一种裂解聚合物，特别是废烃聚合物以产生较低分子量的产物的方法。 该方法包括将聚合物进料到处理室或圆形横截面中，该室还具有通过引入所述室中的热气体而保持悬浮状态并以环形形状的颗粒材料床，使得聚合物与颗粒材料混合 床，并被分解成较低分子量的产品。 本发明可用于将聚合物废物转化成商业价值的产品，例如 蜡，润滑剂和单体烯烃同时减少环境污染。

    Timing path detailer
    6.
    发明授权
    Timing path detailer 失效
    定时路径细节

    公开(公告)号：US07000206B2

    公开(公告)日：2006-02-14

    申请号：US10949977

    申请日：2004-09-24

    申请人： David A. Kidd ,  Matthew J. Page

    发明人： David A. Kidd ,  Matthew J. Page

    IPC分类号： G06F17/50

    CPC分类号： G06F17/5031

    摘要： A method (and a computer accessible medium comprising one or more instructions which, when executed, implement the method) is contemplated. At least a first timing path is identified in a first timing report corresponding to a first partition of a circuit. For at least one timing constraint applied to the first timing path, a second timing path in a second partition of the circuit that causes the timing constraint is determined. A second timing report comprising the first timing path from the first timing report and the second timing path from the second partition is generated.

    摘要翻译： 一种方法（以及包括一个或多个指令的计算机可访问介质，当被执行时执行该方法）。 在对应于电路的第一分区的第一定时报告中识别至少第一定时路径。 对于施加到第一定时路径的至少一个定时约束，确定引起定时约束的电路的第二分区中的第二定时路径。 生成包括来自第一定时报告的第一定时路径和来自第二分区的第二定时路径的第二定时报告。

    User definable interface system, method, support tools, and computer program product
    7.
    发明授权
    User definable interface system, method, support tools, and computer program product 失效
    用户界面界面系统，方法，支持工具和计算机程序产品

    公开(公告)号：US07895530B2

    公开(公告)日：2011-02-22

    申请号：US10931128

    申请日：2004-08-30

    申请人： Joseph Miller Leavitt ,  Darrell D. Diem ,  David A. Kidd

    发明人： Joseph Miller Leavitt ,  Darrell D. Diem ,  David A. Kidd

    IPC分类号： G06F3/048 ,  G06F3/00 ,  G06F3/14

    CPC分类号： B60K37/06 ,  B60K35/00 ,  B60K2350/1016 ,  B60K2350/1024 ,  B60K2350/1028 ,  B60K2350/901 ,  G06F3/0482

    摘要： In a cursor-based computing environment generating a display, a user-definable interface is configured by a user and activated when needed by a user, wherein the user-definable interface comprises a plurality of buttons. Functions of the buttons are selectable by the user according to his preferences. These preferences may be derived from applications or by functions selected exclusively by the user. An application (ZTool) is also described, this application allowing configuration of a display in accordance with predetermined parameters. These parameters may be related to data base access functions or other types of data access, including logistical support.

    摘要翻译： 在生成显示器的基于光标的计算环境中，用户可定义的界面由用户配置并且在用户需要时激活，其中用户可定义的界面包括多个按钮。 按钮的功能可由用户根据自己的喜好选择。 这些偏好可以从应用程序或由用户专门选择的功能导出。 还描述了应用（ZTool），该应用允许根据预定参数配置显示器。 这些参数可能与数据库访问功能或其他类型的数据访问有关，包括后勤支持。

    Timing path detailer
    8.
    发明授权
    Timing path detailer 失效

    公开(公告)号：US06834379B2

    公开(公告)日：2004-12-21

    申请号：US10283866

    申请日：2002-10-30

    申请人： David A. Kidd ,  Matthew J. Page

    发明人： David A. Kidd ,  Matthew J. Page

    IPC分类号： G06F1750

    CPC分类号： G06F17/5031

    摘要： A method (and a computer accessible medium comprising one or more instructions which, when executed, implement the method) is contemplated. At least a first timing path is identified in a first timing report corresponding to a first partition of a circuit. For at least one timing constraint applied to the first timing path, a second timing path in a second partition of the circuit that causes the timing constraint is determined. A second timing report comprising the first timing path from the first timing report and the second timing path from the second partition is generated.