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    Cover window for a display panel
    1.
    外观设计
    Cover window for a display panel 有权

    公开(公告)号：USD1044788S1

    公开(公告)日：2024-10-01

    申请号：US29710482

    申请日：2019-10-23

    Applicant: Samsung Display Co., Ltd.

    Designer： Jung Kyu Lee ,  Seung-Hwan Cho ,  Jong Hyun Choi ,  Young Su Kim ,  Cheul Jin Park

    Abstract: FIG. 1 is a perspective view of the cover window for a display panel according to an embodiment of the present design;
    FIG. 2 is a front view thereof;
    FIG. 3 is a rear view thereof;
    FIG. 4 is a left side view thereof, with the right side view being a mirror image thereof;
    FIG. 5 is a top view thereof, with the bottom view being a mirror image thereof; and,
    FIG. 6 is another perspective view thereof.

    Display device with a reduced dead space
    3.
    发明授权
    Display device with a reduced dead space 有权

    公开(公告)号：US11195456B2

    公开(公告)日：2021-12-07

    申请号：US16841605

    申请日：2020-04-06

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jung Kyu Lee ,  Seung Hwan Cho ,  Min Joo Kim ,  Tae Hyun Kim ,  Dong Hwan Shim

    IPC: G09G3/3225 ,  H01L27/32 ,  H01L27/12 ,  H01L29/786

    Abstract: A display device includes: a display area and a non-display area positioned around the display area and including a pad portion and a contact portion that is disposed between the display area and the pad portion; a first circuit portion including an embedded circuit disposed in the display area, a first connection electrode disposed in the pad portion, and a second connection electrode disposed in the contact portion; and a second circuit portion disposed on a layer different from the first circuit portion and including a pixel disposed in the display area, a pad disposed in the pad portion, and a data line extending across the contact portion and the display area and electrically connected to the pixel. The pad is electrically connected to the embedded circuit through the first connection electrode. The data line is electrically connected to the embedded circuit via the second connection electrode.

    Thin film transistor array panel and method of manufacturing the same
    4.
    发明授权
    Thin film transistor array panel and method of manufacturing the same 有权
    薄膜晶体管阵列面板及其制造方法

    公开(公告)号：US09368515B2

    公开(公告)日：2016-06-14

    申请号：US14070886

    申请日：2013-11-04

    Applicant: SAMSUNG DISPLAY CO., LTD.

    Inventor： Dong Jo Kim ,  Ji Seon Lee ,  Jong Chan Lee ,  Yoon Ho Khang ,  Sang Ho Park ,  Yong Su Lee ,  Jung Kyu Lee

    IPC: H01L27/12

    CPC classification number: H01L27/1225 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1288

    Abstract: A thin film transistor array panel may include a channel layer including an oxide semiconductor and formed in a semiconductor layer, a source electrode formed in the semiconductor layer and connected to the channel layer at a first side, a drain electrode formed in the semiconductor layer and connected to the channel layer at an opposing second side, a pixel electrode formed in the semiconductor layer in a same portion of the semiconductor layer as the drain electrode, an insulating layer disposed on the channel layer, a gate line including a gate electrode disposed on the insulating layer, a passivation layer disposed on the source and drain electrodes, the pixel electrode, and the gate line, and a data line disposed on the passivation layer. A width of the channel layer may be substantially equal to a width of the pixel electrode in a direction parallel to the gate line.

    Abstract translation: 薄膜晶体管阵列面板可以包括在半导体层中形成的氧化物半导体的沟道层，形成在半导体层中并连接到第一侧的沟道层的源电极，形成在半导体层中的漏电极和 连接到相对的第二侧的沟道层，形成在与漏电极的半导体层相同的部分中的半导体层中的像素电极，设置在沟道层上的绝缘层，设置在栅电极上的栅极线 绝缘层，设置在源电极和漏电极上的钝化层，像素电极和栅极线以及设置在钝化层上的数据线。 沟道层的宽度可以基本上等于像素电极在与栅极线平行的方向上的宽度。

    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME
    7.
    发明申请
    THIN FILM TRANSISTOR ARRAY PANEL AND METHOD OF MANUFACTURING THE SAME 有权
    薄膜晶体管阵列及其制造方法

    公开(公告)号：US20140175429A1

    公开(公告)日：2014-06-26

    申请号：US14070886

    申请日：2013-11-04

    Applicant: Samsung Display Co., Ltd.

    Inventor： DONG JO KIM ,  Ji Seon Lee ,  Jong Chan Lee ,  Yoon Ho Khang ,  Sang Ho Park ,  Yong Su Lee ,  Jung Kyu Lee

    IPC: H01L27/12

    CPC classification number: H01L27/1225 ,  H01L27/1214 ,  H01L27/127 ,  H01L27/1288

    Abstract: A thin film transistor array panel may include a channel layer including an oxide semiconductor and formed in a semiconductor layer, a source electrode formed in the semiconductor layer and connected to the channel layer at a first side, a drain electrode formed in the semiconductor layer and connected to the channel layer at an opposing second side, a pixel electrode formed in the semiconductor layer in a same portion of the semiconductor layer as the drain electrode, an insulating layer disposed on the channel layer, a gate line including a gate electrode disposed on the insulating layer, a passivation layer disposed on the source and drain electrodes, the pixel electrode, and the gate line, and a data line disposed on the passivation layer. A width of the channel layer may be substantially equal to a width of the pixel electrode in a direction parallel to the gate line.

    Abstract translation: 薄膜晶体管阵列面板可以包括在半导体层中形成的氧化物半导体的沟道层，形成在半导体层中并连接到第一侧的沟道层的源电极，形成在半导体层中的漏电极和 连接到相对的第二侧的沟道层，形成在与漏电极的半导体层相同的部分中的半导体层中的像素电极，设置在沟道层上的绝缘层，设置在栅电极上的栅极线 绝缘层，设置在源电极和漏电极上的钝化层，像素电极和栅极线以及设置在钝化层上的数据线。 沟道层的宽度可以基本上等于像素电极在与栅极线平行的方向上的宽度。

    Display device and manufacturing method thereof
    9.
    发明授权
    Display device and manufacturing method thereof 有权

    公开(公告)号：US10297772B2

    公开(公告)日：2019-05-21

    申请号：US15711121

    申请日：2017-09-21

    Applicant: Samsung Display Co., Ltd.

    Inventor： Jung Kyu Lee ,  Tae Hyun Kim ,  Sang Ho Park ,  Dong Hwan Shim ,  Seung Min Lee ,  Seung-Hwan Cho

    IPC: H01L51/00 ,  H01L27/32 ,  H01L51/52

    Abstract: A display device includes: a substrate including a display area, a non-display area at which the image is not displayed and a first area including the display area, the non-display area including a bending area at which the display device is bendable between the first area and a second area; a first wire in the first area, the first wire and connected to the display area; a second wire in the second area; a protection layer in the first, second and bending areas, first and second contact holes in the protection layer and exposing the first and second wires; and a connection wire connected to the first wire, extended from the first area to traverse the bending area and connected to the second wire. The connection wire includes a plurality of conductive layers contacting each other, the plurality of conductive layers including a same material.

    Organic light emitting diode display and manufacturing method thereof
    10.
    发明授权
    Organic light emitting diode display and manufacturing method thereof 有权

    公开(公告)号：US09741962B2

    公开(公告)日：2017-08-22

    申请号：US14969321

    申请日：2015-12-15

    Applicant: Samsung Display Co., Ltd.

    Inventor： Sung Eun Lee ,  Seung-Hwan Cho ,  Dong Hwan Shim ,  Joo Sun Yoon ,  Jung Kyu Lee

    IPC: H01L29/08 ,  H01L51/52 ,  H01L27/32

    CPC classification number: H01L51/5246 ,  H01L27/3258 ,  H01L27/3276

    Abstract: An organic light emitting diode display includes: a substrate including a display area displaying an image and a peripheral area enclosing the display area; a plurality of signal lines formed in the display area; a plurality of pixels connected to the plurality of signal lines; a plurality of fan-out lines formed in the peripheral area and connected to the plurality of pixels; a first interlayer insulating layer covering the plurality of fan-out lines; a second interlayer insulating layer covering the first interlayer insulating layer and including a first sealant opening exposing a portion of the first interlayer insulating layer; and an etching preventing member positioned in the first sealant opening and overlapping the plurality of fan-out lines in plan view.

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