公开(公告)号：US20200161394A1

公开(公告)日：2020-05-21

申请号：US16536104

申请日：2019-08-08

Applicant: Samsung Display Co., Ltd.

Inventor： Woo-Seok JEON

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/56 ,  H01L51/00

Abstract: A method for forming a light emitting element pattern according to an embodiment of the inventive concept includes forming a pattern layer having an opening on a target material, forming a light emitting element pattern on the target material in correspondence to the opening, and removing the pattern layer. Here, the pattern layer includes a first pattern layer disposed on the target material, a second pattern layer disposed on the first pattern layer, and a third pattern layer disposed on the second pattern layer. The second pattern layer has an undercut portion recessed from edges of the third pattern layer.

公开(公告)号：US20240292667A1

公开(公告)日：2024-08-29

申请号：US18519369

申请日：2023-11-27

Applicant: Samsung Display Co., LTD.

Inventor： Hyun Eok SHIN ,  Dong Min LEE ,  Woo-Seok JEON ,  Yung Bin CHUNG ,  Yu-Gwang JEONG

IPC: H10K59/122 ,  H10K59/12 ,  H10K59/80

CPC classification number: H10K59/122 ,  H10K59/1201 ,  H10K59/80522

Abstract: A display device includes a plurality of transistors disposed on a substrate, an insulating layer disposed on the transistors, a first electrode disposed on the insulating layer and electrically connected to the transistors, a partition wall disposed on the insulating layer, a common layer disposed on the partition wall and the first electrode, an emission layer disposed on the common layer, a second electrode disposed on the emission layer, and an auxiliary layer disposed on the second electrode. The partition wall includes a groove, and an inner width of the groove is greater than an inlet width of the groove.

公开(公告)号：US20190148472A1

公开(公告)日：2019-05-16

申请号：US16185492

申请日：2018-11-09

Applicant: Samsung Display Co., Ltd.

Inventor： Woo-Seok JEON ,  Byeong-Beom KIM ,  Chulmin BAE ,  Jinho HWANG

IPC: H01L27/32

Abstract: An organic light emitting display device includes a substrate, an active layer, a gate electrode, a first high dielectric constant (hereinafter “high-k”) insulation structure, source and drain electrodes, and a light emitting structure. The active layer is disposed on the substrate. The gate electrode is disposed on the active layer. The first high-k insulation structure is disposed on the gate electrode and includes a carbon-doped first high-k insulation layer and a first ammonia layer on the carbon-doped first high-k insulation layer. The source and drain electrodes are disposed on the first high-k insulation structure and constitute a semiconductor element together with the active layer and the gate electrode. The light emitting structure is disposed on the source and drain electrodes.

公开(公告)号：US20210343808A1

公开(公告)日：2021-11-04

申请号：US17375042

申请日：2021-07-14

Applicant: Samsung Display Co., Ltd.

Inventor： Woo-Seok JEON

IPC: H01L27/32 ,  H01L51/00 ,  H01L51/56 ,  H01L51/52

Abstract: A method for forming a light emitting element pattern according to an embodiment of the inventive concept includes forming a pattern layer having an opening on a target material, forming a light emitting element pattern on the target material in correspondence to the opening, and removing the pattern layer. Here, the pattern layer includes a first pattern layer disposed on the target material, a second pattern layer disposed on the first pattern layer, and a third pattern layer disposed on the second pattern layer. The second pattern layer has an undercut portion recessed from edges of the third pattern layer.

公开(公告)号：US20160223872A1

公开(公告)日：2016-08-04

申请号：US14808570

申请日：2015-07-24

Applicant: Samsung Display Co., Ltd.

Inventor： Woo-Seok JEON ,  Sung Hoon YANG ,  Chang Ok KIM ,  Jung Yun JO

IPC: G02F1/1343 ,  G02F1/1333 ,  G02F1/1368 ,  H01L27/12 ,  G02F1/1362

CPC classification number: G02F1/134309 ,  G02F1/133345 ,  G02F1/134363 ,  G02F1/13439 ,  G02F1/136286 ,  G02F1/1368 ,  H01L27/124 ,  H01L27/1248

Abstract: A liquid crystal display device includes a substrate; a gate line and a data line positioned on the substrate; a thin film transistor connected to the gate line and the data line; a passivation layer positioned on the gate line, the data line, and the thin film transistor; a first electrode positioned on the passivation layer; an interlayer insulating layer positioned on the first electrode; and a second electrode positioned on the interlayer insulating layer, wherein the first electrode includes a first layer made of an indium-zinc oxide in which a weight ratio of an indium oxide is 20 wt % or less or made of a transparent metal oxide that does not contain an indium oxide.

Abstract translation: 液晶显示装置包括：基板; 位于基板上的栅极线和数据线; 连接到栅极线和数据线的薄膜晶体管; 位于栅极线，数据线和薄膜晶体管上的钝化层; 位于所述钝化层上的第一电极; 位于所述第一电极上的层间绝缘层; 以及位于所述层间绝缘层上的第二电极，其中，所述第一电极包括由氧化铟重量比为20重量％以下或由透明金属氧化物构成的铟 - 锌氧化物制成的第一层， 不含氧化铟。

公开(公告)号：US20140332889A1

公开(公告)日：2014-11-13

申请号：US14012580

申请日：2013-08-28

Applicant: Samsung Display Co., Ltd.

Inventor： Seung-Ho JUNG ,  Young Joo CHOI ,  Joon Geol KIM ,  Kang Moon JO ,  Sho Yeon KIM ,  Byung Hwan CHU ,  Woo Geun LEE ,  Woo-Seok JEON

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L27/1288

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract translation: 公开了薄膜晶体管阵列面板。 薄膜晶体管阵列面板可以包括设置在基板上并包括栅电极的栅极线，包括设置在基板上的氧化物半导体的半导体层，设置在基板上的数据布线层，并且包括与栅极线交叉的数据线 连接到数据线的源电极和面对源电极的漏电极，覆盖源电极和漏电极的聚合物层和设置在聚合物层上的钝化层。 数据布线层可以包括铜或铜合金，并且聚合物层可以包括碳氟化合物。

公开(公告)号：US20230309343A1

公开(公告)日：2023-09-28

申请号：US18089457

申请日：2022-12-27

Applicant: Samsung Display Co., LTD.

Inventor： Keunwoo KIM ,  Taewook KANG ,  Yeoungkeol WOO ,  Woo-Seok JEON

IPC: H10K59/121

CPC classification number: H10K59/1213 ,  H10K59/1216

Abstract: A display device includes a substrate, an active pattern disposed on the substrate, and including a first area, a second area, a (1-1)th channel area, a (1-2)th channel area, and a third area disposed between the (1-1)th channel area and the (1-2)th channel area, a first insulating layer disposed on the substrate and covering the active pattern, a second insulating layer which is disposed on the first insulating layer and in which an opening overlapping the (1-2)th channel area, the second area, and the third area is defined, a first gate electrode disposed on the first insulating layer and overlapping the (1-1)th channel area the (1-2)th channel area, respectively, and a high dielectric layer disposed on the first insulating layer and the second insulating layer, covering the first gate electrode, and filling the opening.

公开(公告)号：US20190206969A1

公开(公告)日：2019-07-04

申请号：US16143934

申请日：2018-09-27

Applicant: SAMSUNG DISPLAY CO., LTD.

Inventor： JIN HO HWANG ,  Byeong-Beom KIM ,  Chul Min BAE ,  Woo-Seok JEON

IPC: H01L27/32 ,  H01L51/52 ,  H01L51/50 ,  G09G3/3291 ,  G09G3/3266

Abstract: A display device includes: a substrate; a semiconductor on the substrate and including a driving channel; a first insulating layer on the semiconductor; a driving gate electrode on the first insulating layer and overlapping the driving channel; a second insulating layer on the driving gate electrode and the first insulating layer and including first and second dielectric constant layers, the second dielectric constant layer having a dielectric constant that is greater than that of the first dielectric constant layer; a storage electrode on the second insulating layer; a passivation layer covering the storage electrode and the second insulating layer; a pixel electrode on the passivation layer; an emission member on the pixel electrode; and a common electrode on the emission member, wherein the storage electrode overlaps the driving gate electrode, and wherein the storage electrode, the driving gate electrode and the second insulating layer therebetween form a storage capacitor.

公开(公告)号：US20170104048A1

公开(公告)日：2017-04-13

申请号：US15210563

申请日：2016-07-14

Applicant: Samsung Display Co., Ltd.

Inventor： Yung-Bin CHUNG ,  Bo-Geon JEON ,  Eun-Jeong CHO ,  Hye-Hyang PARK ,  Sung-Hoon YANG ,  Woo-Seok JEON ,  Joo-Hee JEON ,  Chaun-Gi CHOI

IPC: H01L27/32

CPC classification number: H01L27/3258 ,  H01L27/326 ,  H01L27/3262 ,  H01L51/5253

Abstract: A substrate structure may be used in a display device. The substrate structure may include a base substrate, a transistor, and a silicon oxynitride layer. The transistor may include a semiconductor member and a gate electrode and may overlap the base substrate. The silicon oxynitride layer may directly contact at least one of the base substrate, the semiconductor member, and the gate electrode and may include (and/or contain) a hydrogen atom set. A hydrogen concentration in the silicon oxynitride layer may be greater than or equal to 1.52 atomic percent.

公开(公告)号：US20150187813A1

公开(公告)日：2015-07-02

申请号：US14659120

申请日：2015-03-16

Applicant: Samsung Display Co., Ltd.

Inventor： Seung-Ho JUNG ,  Young Joo CHOI ,  Joon Geol KIM ,  Kang Moon JO ,  Sho Yeon KIM ,  Byung Hwan CHU ,  Woo Geun LEE ,  Woo-Seok JEON

IPC: H01L27/12

CPC classification number: H01L27/124 ,  H01L27/1214 ,  H01L27/1225 ,  H01L27/1248 ,  H01L27/1259 ,  H01L27/1262 ,  H01L27/1288

Abstract: A thin film transistor array panel is disclosed. The thin film transistor array panel may include a gate line disposed on a substrate and including a gate electrode, a semiconductor layer including an oxide semiconductor disposed on the substrate, a data wiring layer disposed on the substrate and including a data line crossing the gate line, a source electrode connected to the data line and a drain electrode facing the source electrode, a polymer layer covering the source electrode and the drain electrode, and a passivation layer disposed on the polymer layer. The data wiring layer may include copper or a copper alloy and the polymer layer may include fluorocarbon.

Abstract translation: 公开了薄膜晶体管阵列面板。 薄膜晶体管阵列面板可以包括设置在基板上并包括栅电极的栅极线，包括设置在基板上的氧化物半导体的半导体层，设置在基板上的数据布线层，并且包括与栅极线交叉的数据线 连接到数据线的源电极和面对源电极的漏电极，覆盖源电极和漏电极的聚合物层和设置在聚合物层上的钝化层。 数据布线层可以包括铜或铜合金，并且聚合物层可以包括碳氟化合物。