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1.发明授权公开(公告)号：US10713095B2
公开(公告)日：2020-07-14
申请号：US15469828
申请日：2017-03-27
Applicant: Samsung Electronics Co., Ltd.
Inventor： Donghoon Yoo , Bernhard Egger
IPC: G06F9/50
Abstract: A method of controlling a multi-core processor includes allocating at least one core of the multi-core processor to at least one process for execution; generating a translation table with respect to the at least one process to translate a logical ID of the at least one core allocated to the at least one process to a physical ID; and controlling the at least one process based on the translation table generated with respect to the at least one process.
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公开(公告)号：US09141498B2
公开(公告)日：2015-09-22
申请号：US14020061
申请日：2013-09-06
Inventor： Seong-hoon Jeong , Bernhard Egger , Daeyong Shin , Changyeon Jo
IPC: G06F11/22 , G06F11/263
CPC classification number: G06F11/2273 , G06F11/263 , G06F2217/68
Abstract: A method for verifying an operation of a reconfigurable processor is provided. The method includes generating a random test program using a test description and an architecture description, executing the generated random test program in the reconfigurable processor and in a simulator, and then comparing types of output values in the execution result.
Abstract translation: 提供了一种用于验证可重构处理器的操作的方法。 该方法包括使用测试描述和架构描述生成随机测试程序，在可重构处理器和模拟器中执行生成的随机测试程序，然后比较执行结果中的输出值的类型。
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3.发明申请PERFORMANCE MEASUREMENT UNIT, PROCESSOR CORE INCLUDING THE SAME AND PROCESS PROFILING METHOD 审中-公开性能测量单元，加工者核心及其相关工艺分析方法公开(公告)号：US20140149078A1
公开(公告)日：2014-05-29
申请号：US14087543
申请日：2013-11-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： MIN-JU LEE , Young-Lak Kim , Bernhard Egger , Jae-Jin Lee , Hong-Gyu Kim , Hong-June Kim
IPC: G06F11/34
CPC classification number: G06F11/3409 , G06F11/348 , G06F2201/86 , G06F2201/88 , G06F2201/885
Abstract: A performance measurement unit includes an event counter configured to record a counter value indicating a number of events occurring in a processor core, and a shadowed event counter configured to copy the counter value recorded in the event counter to the shadowed event counter. The performance measurement unit is configured to determine a number of effective events occurring in the processor core using the event counter and the shadowed event counter. Effective events correspond to events occurring when a selected process is executed.
Abstract translation: 性能测量单元包括：事件计数器，被配置为记录指示处理器核心中发生的事件的数量的计数器值;以及被配置为将记录在事件计数器中的计数器值复制到阴影事件计数器的阴影事件计数器。 性能测量单元被配置为使用事件计数器和阴影事件计数器来确定在处理器核心中发生的有效事件的数量。 有效事件对应于执行所选进程时发生的事件。
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4.发明申请公开(公告)号：US20190339760A1
公开(公告)日：2019-11-07
申请号：US16518421
申请日：2019-07-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bernhard Egger , Younghyun CHO , Su-Rim Oh , Dong-hoon Yoo
IPC: G06F1/28 , G06F1/20 , G06F1/324 , G06F1/3296
Abstract: Provided are computing devices, each including a plurality of cores, and methods of allocating power to the plurality of cores. The computing device includes: a control core group including a plurality of control cores, the control core group configured to allocate a power budget to processing cores according to an energy management policy and state information of the processing cores, and transmit the allocated power budget to at least one of a lower control core and the processing cores; and a processing core group including at least one or more of the processing cores, the processing core group configured to perform computations based on the power budget allocated by the control core group, and transmit state information of the processing cores to the control core group, the state information of the processing cores having been modified based on the computations performed.
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公开(公告)号：US09959191B2
公开(公告)日：2018-05-01
申请号：US14087667
申请日：2013-11-22
Applicant: Samsung Electronics Co., Ltd.
Inventor： Min-Ju Lee , Bernhard Egger , Jae-jin Lee , Young-Lak Kim , Hong-Gyu Kim , Hong-June Kim
CPC classification number: G06F11/3466 , G06F11/3409 , G06F11/348 , G06F2201/86 , G06F2201/88
Abstract: A dynamic library profiling method and a dynamic library profiling system including writing a first break point instruction at a start address of a dynamic library function, recording a first event count value that is a process performance management unit (PMU) count when a target process executes the first break point instruction, writing a second break point instruction to a return address of the dynamic library function, and calculating a PMU count generated in a processor core while the dynamic library function is executed, by comparing the recorded first event count value with a second event count value that is a process PMU count when the target process executes the second break point instruction, wherein the process PMU count is a cumulative value of PMU counts generated in the processor core while the target process is executed.
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Patent Agency Ranking
公开(公告)号：US09342480B2
公开(公告)日：2016-05-17
申请号：US14064497
申请日：2013-10-28
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bernhard Egger , Soo-jung Ryu , Dong-hoon Yoo , Il-hyun Park
CPC classification number: G06F15/82 , G06F9/30072 , G06F9/3853
Abstract: An apparatus and method for generating a very long instruction word (VLIW) command that supports predicated execution, and a VLIW processor and method for processing a VLIW are provided herein. The VLIW command includes an instruction bundle formed of a plurality of instructions to be executed in parallel and a single value indicating predicated execution, and is generated using the apparatus and method for generating a VLIW command. The VLIW processor decodes the instruction bundle and executes the instructions, which are included in the decoded instruction bundle, in parallel, according to the value indicating predicated execution.
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7.发明授权公开(公告)号：US11301016B2
公开(公告)日：2022-04-12
申请号：US16518421
申请日：2019-07-22
Inventor： Bernhard Egger , Younghyun Cho , Su-Rim Oh , Dong-hoon Yoo
IPC: G06F1/28 , G06F1/20 , G06F1/324 , G06F1/3296 , G06F1/3203 , G06F1/3234
Abstract: Provided are computing devices, each including a plurality of cores, and methods of allocating power to the plurality of cores. The computing device includes: a control core group including a plurality of control cores, the control core group configured to allocate a power budget to processing cores according to an energy management policy and state information of the processing cores, and transmit the allocated power budget to at least one of a lower control core and the processing cores; and a processing core group including at least one or more of the processing cores, the processing core group configured to perform computations based on the power budget allocated by the control core group, and transmit state information of the processing cores to the control core group, the state information of the processing cores having been modified based on the computations performed.
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8.发明授权Apparatus and method for processing invalid operation in prologue or epilogue of loop 有权在循环的序言或结尾处理无效操作的装置和方法公开(公告)号：US09411582B2
公开(公告)日：2016-08-09
申请号：US13832291
申请日：2013-03-15
Inventor： Seong-Hun Jeong , Bernhard Egger , Won-Sub Kim
CPC classification number: G06F9/30007 , G06F8/443 , G06F9/30072 , G06F9/30105 , G06F9/3859 , G06F15/7867
Abstract: An apparatus for processing an invalid operation in a prologue and/or an epilogue of a loop includes a register file including a first region for storing a data validity value indicating whether data is valid or invalid, and a second region for storing the data; and a functional unit configured to determine whether an operation is valid or invalid based on a value of a first region of each of one or more input sources received from the register file, and output a destination including a value based on the value of the first region of each of the input sources.
Abstract translation: 一种用于在循环的序言和/或循环的结尾处理无效操作的装置包括：寄存器文件，包括用于存储指示数据是有效还是无效的数据有效值的第一区域和用于存储数据的第二区域; 以及功能单元，被配置为基于从所述寄存器文件接收到的一个或多个输入源中的每一个的第一区域的值来确定操作是有效还是无效，并且基于所述第一 每个输入源的区域。
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9.发明授权公开(公告)号：US10409351B2
公开(公告)日：2019-09-10
申请号：US15788293
申请日：2017-10-19
Applicant: Samsung Electronics Co., Ltd.
Inventor： Bernhard Egger , Younghyun Cho , Su-Rim Oh , Dong-hoon Yoo
IPC: G06F1/32 , G06F1/28 , G06F1/20 , G06F1/324 , G06F1/3296
Abstract: Provided are computing devices, each including a plurality of cores, and methods of allocating power to the plurality of cores. The computing device includes: a control core group including a plurality of control cores, the control core group configured to allocate a power budget to processing cores according to an energy management policy and state information of the processing cores, and transmit the allocated power budget to at least one of a lower control core and the processing cores; and a processing core group including at least one or more of the processing cores, the processing core group configured to perform computations based on the power budget allocated by the control core group, and transmit state information of the processing cores to the control core group, the state information of the processing cores having been modified based on the computations performed.
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公开(公告)号：US10140247B2
公开(公告)日：2018-11-27
申请号：US15697082
申请日：2017-09-06
Inventor： Bernhard Egger , Ho-chan Lee , Yeon-bok Lee , Suk-jin Kim
Abstract: Methods and apparatuses are provided for compressing configuration data. The configuration data, which includes control data corresponding to at least one processing unit used in each of a plurality of cycles, is stored. A plurality of processing units of a reconfigurable processor is divided into a plurality of groups. The configuration data is partitioned into a plurality of pieces of sub-configuration data. Each piece of sub-configuration data corresponding to a respective one of the plurality of groups. If a plurality of adjacent cycles include identical control data, the configuration data is compressed by deleting control data of all but one of the plurality of adjacent cycles, for each sub-configuration data.
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