公开(公告)号：US20230170222A1

公开(公告)日：2023-06-01

申请号：US17842962

申请日：2022-06-17

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Hoon KWON ,  Chung Ki MIN ,  Bo Un YOON ,  Ki Hoon JANG

IPC: H01L21/306 ,  B24B37/04 ,  B24B57/02

CPC classification number: H01L21/30625 ,  B24B37/042 ,  B24B57/02

Abstract: A method for fabricating a semiconductor device includes providing a polishing pad which includes a first region and a second region separated from each other by a fence, loading a wafer onto the first region, providing a slurry solution onto the first region, providing an ultrapure water onto the second region, turning the polishing pad to polish a surface of the wafer, and unloading the wafer from the polishing pad after polishing on the surface of the wafer is completed, wherein the fence includes a first fence extending from a center of the polishing pad toward an edge of the polishing pad in a first horizontal direction, and a second fence extending from the center of the polishing pad toward the edge of the polishing pad in a second horizontal direction different from the first horizontal direction.

公开(公告)号：US20200227315A1

公开(公告)日：2020-07-16

申请号：US16564688

申请日：2019-09-09

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye Sung PARK ,  Jong Hyuk PARK ,  Jin Woo BAE ,  Bo Un YOON ,  II Young YOON ,  Bong Sik CHOI

IPC: H01L21/768 ,  H01L21/027

Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.

公开(公告)号：US20210242215A1

公开(公告)日：2021-08-05

申请号：US17237195

申请日：2021-04-22

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hye Sung PARK ,  Jong Hyuk PARK ,  Jin Woo BAE ,  Bo Un YOON ,  Il Young YOON ,  Bong Sik CHOI

IPC: H01L27/108 ,  H01L21/027 ,  H01L21/768 ,  H01L23/544

Abstract: A method of manufacturing a semiconductor device includes forming a first pattern structure having a first opening and a second pattern structure having a second opening on a substrate, forming a gap fill layer in the second opening, forming fences and contact structures in the first opening, removing the gap fill layer in the second opening, forming an upper conductive layer to cover the first and second pattern structures, the fences, and the contact structures, forming a mask pattern based on a photolithography process using the second pattern structure covered by the upper conductive layer as an align mark, and etching the upper conductive layer using the mask pattern to form upper conductive patterns. A width of the second opening is larger than a width of a first opening. A thickness of the upper conductive layer is smaller than a depth of the second opening.

公开(公告)号：US20240063044A1

公开(公告)日：2024-02-22

申请号：US18202892

申请日：2023-05-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Dong Hoon KWON ,  Ju Hyun LEE ,  Bo Un YOON

IPC: H01L21/68 ,  H01L21/683 ,  H01L21/687

CPC classification number: H01L21/68 ,  H01L21/6838 ,  H01L21/68757 ,  H01L21/68785

Abstract: A method of fabricating a semiconductor device comprises mounting a carrier substrate and a wafer on a wafer chuck of a wafer chuck apparatus, the carrier substrate and the wafer attached to each other, injecting air into an air member by selectively controlling at least one air injection pipe connected to the air member of the wafer chuck apparatus, tilting the wafer chuck to a predetermined angle in response to the air being injected into the air member, processing the wafer while the wafer chuck is tilted, determining whether to change a tilt angle of the wafer chuck or a position of the wafer, adjusting an amount of air injected into the air member according to a changed tilt angle of the wafer chuck or a changed position of the wafer, and processing the wafer after adjusting of the amount of air in the air member.

公开(公告)号：US20200235165A1

公开(公告)日：2020-07-23

申请号：US16586140

申请日：2019-09-27

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Hao CUI ,  Se Yun PARK ,  Jong Hyuk PARK ,  Bo Un YOON ,  II Young YOON

IPC: H01L27/24 ,  H01L45/00

Abstract: A semiconductor device that includes a plurality of word lines disposed on a substrate in which p-type and n-type active regions are defined, and extends in a first direction. A plurality of bit lines is disposed on the plurality of word lines and extends in a second direction, perpendicular to the first direction. A plurality of memory cells is disposed between the plurality of word lines and the plurality of bit lines and each includes a data storage pattern. The plurality of memory cells includes a plurality of dummy memory cells and a plurality of main memory cells. An upper surface of the data storage pattern of the main memory cells is higher than an upper surface of the data storage pattern of the dummy memory cells.

公开(公告)号：US20200098763A1

公开(公告)日：2020-03-26

申请号：US16411613

申请日：2019-05-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： JIN WOO BAE ,  Su Young SHIN ,  Young Ho KOH ,  Bo Un YOON ,  II Young YOON ,  Yang Hee LEE ,  Hee Sook CHEON

IPC: H01L27/108 ,  H01L21/033 ,  H01L21/311 ,  H01L21/321 ,  H01L49/02 ,  H01L21/3213 ,  H01L21/285

Abstract: A method of forming a semiconductor device includes forming a mold structure on a substrate, forming a first mask layer having a deposition thickness on the mold structure and patterning the first mask layer to form first mask openings which expose the mold structure. The mold structure is etched to form holes that penetrate the mold structure. The first mask layer is thinned to form mask portions having thickness smaller than the deposition thickness. Conductive patterns are formed to fill the holes and the first mask openings. The first mask layer including the mask portions is etched to expose the mold structure. The conductive patterns include protrusions. A chemical mechanical polishing process is performed to remove the protrusions of the conductive patterns.