公开(公告)号：US09899487B2

公开(公告)日：2018-02-20

申请号：US15404703

申请日：2017-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeong-Dong Lee ,  Hye-Young Kang ,  Young-Sin Kim ,  Yong-Kwan Kim ,  Byoung-Wook Jang ,  Augustin Jinwoo Hong ,  Dong-Sik Kong ,  Chang-Hyun Cho

IPC: H01L27/148 ,  H01L29/80 ,  H01L29/76 ,  H01L29/94 ,  H01L21/336 ,  H01L29/423 ,  H01L29/06 ,  H01L29/66 ,  H01L29/78

CPC classification number: H01L29/4236 ,  H01L28/00 ,  H01L29/0642 ,  H01L29/66666 ,  H01L29/7827

Abstract: A semiconductor device may include a linear gate trench that crosses an active region of a substrate of the semiconductor device. The active region may include a plurality of gate areas at a bottom of the gate trench and junction areas at a surface of the substrate in a central portion and opposite end portions of the active region. A conductive line may be in a lower portion of the gate trench. The conductive line may include a gate line and a capping layer that at least partially isolates the gate line from an upper surface of the conductive line. A sealing line may be in an upper portion of the gate trench. The sealing line may cover the conductive line and a surface of the sealing line may be coplanar with the junction areas.

公开(公告)号：US20170263723A1

公开(公告)日：2017-09-14

申请号：US15404703

申请日：2017-01-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Myeong-Dong LEE ,  Hye-Young Kang ,  Young-Sin Kim ,  Yong-Kwan Kim ,  Byoung-Wook Jang ,  Augustin Jinwoo Hong ,  Dong-Sik Kong ,  Chang-Hyun Cho

IPC: H01L29/423 ,  H01L29/66 ,  H01L29/06 ,  H01L29/78

CPC classification number: H01L29/4236 ,  H01L28/00 ,  H01L29/0642 ,  H01L29/66666 ,  H01L29/7827

Abstract: A semiconductor device may include a linear gate trench that crosses an active region of a substrate of the semiconductor device. The active region may include a plurality of gate areas at a bottom of the gate trench and junction areas at a surface of the substrate in a central portion and opposite end portions of the active region. A conductive line may be in a lower portion of the gate trench. The conductive line may include a gate line and a capping layer that at least partially isolates the gate line from an upper surface of the conductive line. A sealing line may be in an upper portion of the gate trench. The sealing line may cover the conductive line and a surface of the sealing line may be coplanar with the junction areas.