公开(公告)号：US08963325B2

公开(公告)日：2015-02-24

申请号：US13739372

申请日：2013-01-11

Applicant: Samsung Electronics Co., Ltd.

Inventor： Baik-woo Lee ,  Young-hun Byun ,  Seong-woon Booh ,  Chang-mo Jeong

IPC: H01L29/40 ,  H01L21/44 ,  H01L23/498 ,  H01L21/02 ,  H01L23/00 ,  H01L23/373

CPC classification number: H01L23/49866 ,  H01L21/02697 ,  H01L23/3735 ,  H01L24/03 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/03424 ,  H01L2224/03464 ,  H01L2224/0508 ,  H01L2224/05644 ,  H01L2224/05664 ,  H01L2224/06181 ,  H01L2224/291 ,  H01L2224/29139 ,  H01L2224/32225 ,  H01L2224/45015 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48844 ,  H01L2224/48847 ,  H01L2224/48864 ,  H01L2224/73265 ,  H01L2224/8384 ,  H01L2224/85444 ,  H01L2224/85447 ,  H01L2924/01322 ,  H01L2924/13033 ,  H01L2924/1305 ,  H01L2924/13055 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/3011 ,  H01L2924/3511 ,  H01L2924/014 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/00014

Abstract: According to example embodiments of inventive concepts, a power device includes a semiconductor structure having a first surface facing a second surface, an upper electrode, and a lower electrode. The upper electrode may include a first contact layer that is on the first surface of the semiconductor structure, and a first bonding pad layer that is on the first contact layer and is formed of a metal containing nickel (Ni). The lower electrode may include a second contact layer that is under the second surface of the semiconductor structure, and a second bonding pad layer that is under the second contact layer and is formed of a metal containing Ni.

Abstract translation: 根据本发明构思的示例实施例，功率器件包括具有面向第二表面的第一表面，上电极和下电极的半导体结构。 上电极可以包括在半导体结构的第一表面上的第一接触层和位于第一接触层上并由含镍（Ni）的金属形成的第一接合焊盘层。 下部电极可以包括在半导体结构的第二表面下方的第二接触层和位于第二接触层下方并由含有Ni的金属形成的第二接合焊盘层。

公开(公告)号：US09520377B2

公开(公告)日：2016-12-13

申请号：US14311708

申请日：2014-06-23

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jeong-Won Yoon ,  Baik-woo Lee ,  Seong-woon Booh ,  Chang-mo Jeong

IPC: H01L23/48 ,  H01L23/00 ,  B23K1/00 ,  B23K20/02 ,  B23K20/16 ,  B23K20/233 ,  B23K35/02

CPC classification number: H01L24/29 ,  B23K1/0016 ,  B23K20/023 ,  B23K20/16 ,  B23K20/233 ,  B23K35/0244 ,  B23K35/025 ,  B23K2101/42 ,  H01L24/32 ,  H01L24/33 ,  H01L24/83 ,  H01L24/95 ,  H01L24/97 ,  H01L2224/04026 ,  H01L2224/05568 ,  H01L2224/05624 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/2732 ,  H01L2224/29083 ,  H01L2224/29139 ,  H01L2224/293 ,  H01L2224/29339 ,  H01L2224/29499 ,  H01L2224/32225 ,  H01L2224/32503 ,  H01L2224/32507 ,  H01L2224/33181 ,  H01L2224/83091 ,  H01L2224/83097 ,  H01L2224/83192 ,  H01L2224/83203 ,  H01L2224/8382 ,  H01L2224/83825 ,  H01L2224/8383 ,  H01L2224/8384 ,  H01L2224/83905 ,  H01L2224/97 ,  H01L2924/13055 ,  H01L2924/13091 ,  H01L2924/15787 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/83

Abstract: Semiconductor device packages and methods of manufacturing the semiconductor device packages are provided. A semiconductor device package may include a bonding layer between a substrate and a semiconductor chip, and the bonding layer may include an intermetallic compound. The intermetallic compound may be a compound of metal and solder material. The intermetallic compound may include Ag3Sn. A method of manufacturing the semiconductor device package may include forming a bonding layer, which bonds a semiconductor chip to a substrate, by using a mixed paste including metal particles and a solder material. The bonding layer may be formed by forming an intermetallic compound, which is formed by heating the mixed paste to react the metal particles with the solder material.

Abstract translation: 提供半导体器件封装和制造半导体器件封装的方法。 半导体器件封装可以包括在衬底和半导体芯片之间的结合层，并且结合层可以包括金属间化合物。 金属间化合物可以是金属和焊料材料的化合物。 金属间化合物可以包括Ag 3 Sn。 制造半导体器件封装的方法可以包括通过使用包括金属颗粒和焊料材料的混合膏形成将半导体芯片与基板结合的接合层。 接合层可以通过形成金属间化合物而形成，该金属间化合物是通过加热混合的糊料使金属颗粒与焊料材料反应形成的。