公开(公告)号：US20180040669A1

公开(公告)日：2018-02-08

申请号：US15485594

申请日：2017-04-12

Applicant: Samsung Electronics Co., Ltd.

Inventor： Zhe WU ,  Jeong Hee PARK ,  Dong Ho AHN ,  Jin Woo LEE ,  Hee Ju SHIN ,  Ja Bin LEE

IPC: H01L27/24 ,  H01L23/528 ,  H01L43/10 ,  H01L43/08 ,  H01L27/22 ,  H01L45/00 ,  H01L43/02

CPC classification number: H01L27/2427 ,  H01L23/528 ,  H01L27/224 ,  H01L27/2481 ,  H01L43/02 ,  H01L43/08 ,  H01L43/10 ,  H01L45/06 ,  H01L45/08 ,  H01L45/1233 ,  H01L45/1246 ,  H01L45/1253 ,  H01L45/143 ,  H01L45/144 ,  H01L45/146 ,  H01L45/148

Abstract: There is provided a non-volatile memory device which can enhance the reliability of a memory device by using an ovonic threshold switch (OTS) selection element including a multilayer structure. The non-volatile memory device includes a first electrode and a second electrode spaced apart from each other, a selection element layer between the first electrode and the second electrode, which is closer to the second electrode rather than to the first electrode, and which includes a first chalcogenide layer, a second chalcogenide layer, and a material layer disposed between the first and second chalcogenide layers. The first chalcogenide layer including a first chalcogenide material, and the second chalcogenide layer including a second chalcogenide material. A memory layer between the first electrode and the selection element layer includes a third chalcogenide material which is different from the first and second chalcogenide materials.

公开(公告)号：US20240284802A1

公开(公告)日：2024-08-22

申请号：US18242084

申请日：2023-09-05

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee Ju SHIN ,  Se Chung OH ,  Jun Ho JEONG

IPC: H10N50/20 ,  H10B61/00 ,  H10N50/01 ,  H10N50/80 ,  H10N50/85

CPC classification number: H10N50/20 ,  H10B61/22 ,  H10N50/01 ,  H10N50/80 ,  H10N50/85

Abstract: A magnetic memory device and a method for fabricating the same are provided. The magnetic memory device includes a pinned layer pattern, a free layer pattern including boron (B), a tunnel barrier layer pattern between the pinned layer pattern and the free layer pattern, an oxide layer pattern spaced apart from the tunnel barrier layer pattern with the free layer pattern therebetween, the oxide layer pattern including a metal borate, and a capping layer pattern spaced apart from the free layer pattern with the oxide layer pattern therebetween, the capping layer pattern including a metal boride, wherein a difference between a boron concentration of the free layer pattern and a boron concentration of the oxide layer pattern is 10 at % or less, and a difference between the boron concentration of the oxide layer pattern and a boron concentration of the capping layer pattern is 10 at % or less.

公开(公告)号：US20220235450A1

公开(公告)日：2022-07-28

申请号：US17721428

申请日：2022-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Woong KIM ,  Hyeon Woo SEO ,  Hee Ju SHIN ,  Se Chung OH ,  Hyun CHO

IPC: C23C14/34 ,  C23C14/35 ,  H01J37/32 ,  C23C14/08

Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.

公开(公告)号：US20220020409A1

公开(公告)日：2022-01-20

申请号：US17202648

申请日：2021-03-16

Applicant: Samsung Electronics Co., Ltd.

Inventor： Hee Ju SHIN ,  Sang Hwan PARK ,  Se Chung OH ,  Ki Woong KIM ,  Hyeon Woo SEO

IPC: G11C11/16 ,  H01F10/32 ,  H01L43/08 ,  H01L43/10 ,  H01L43/02 ,  H01L43/12

Abstract: A magnetic memory device includes a pinned layer, a free layer, a tunnel barrier layer between the pinned layer and the free layer, a first oxide layer spaced apart from the tunnel barrier layer with the free layer therebetween, and a second oxide layer spaced apart from the free layer with the first oxide layer therebetween. The first oxide layer includes an oxide of a first material and may have a thickness of 0.3 Å to 2.0 Å. The second oxide layer may include an oxide of a second material and may have a thickness of 0.1 Å to 5.0 Å. A first oxygen affinity of the first material may be greater than a second oxygen affinity of the second material.