公开(公告)号：US20220102427A1

公开(公告)日：2022-03-31

申请号：US17230029

申请日：2021-04-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Jae Hoon KIM ,  Sang Hwan PARK ,  Yong-Sung PARK ,  Hyeonwoo SEO ,  Se Chung OH ,  Hyun CHO

IPC: H01L27/22 ,  H01L27/24

Abstract: A variable resistance memory device including a substrate; horizontal structures spaced apart from each other in a first direction perpendicular to a top surface of the substrate; variable resistance patterns on the horizontal structures, respectively; and conductive lines on the variable resistance patterns, respectively, wherein each of the horizontal structures includes a first electrode pattern, a semiconductor pattern, and a second electrode pattern arranged along a second direction parallel to the top surface of the substrate, and each of the variable resistance patterns is between one of the second electrode patterns and a corresponding one of the conductive lines.

公开(公告)号：US20220235450A1

公开(公告)日：2022-07-28

申请号：US17721428

申请日：2022-04-15

Applicant: Samsung Electronics Co., Ltd.

Inventor： Ki Woong KIM ,  Hyeon Woo SEO ,  Hee Ju SHIN ,  Se Chung OH ,  Hyun CHO

IPC: C23C14/34 ,  C23C14/35 ,  H01J37/32 ,  C23C14/08

Abstract: A sputtering apparatus including a chamber, a stage inside the chamber and configured to receive a substrate thereon, a first sputter gun configured to provide a sputtering source to an inside of the chamber, a first RF source configured to provide a first power having a first frequency to the first sputter gun, and a second RF source configured to provide a second power having a second frequency to the first sputter gun, the second frequency being lower than the first frequency may be provided.

公开(公告)号：US20200136020A1

公开(公告)日：2020-04-30

申请号：US16727986

申请日：2019-12-27

Applicant: Samsung Electronics Co., Ltd.

Inventor： Yong-Sung PARK ,  Woo-Jin KIM ,  Jeong-Heon PARK ,  Se-Chung OH ,  Joon-Myoung LEE ,  Hyun CHO

IPC: H01L43/02 ,  H01L27/22 ,  H01L43/12 ,  H01L43/10

Abstract: The methods of manufacturing an MRAM device and MRAM devices are provided. The methods may include forming a first electrode on an upper surface of a substrate, forming a first magnetic layer on the first electrode, forming a tunnel barrier structure on the first magnetic layer, forming a second magnetic layer on the tunnel barrier structure, and forming a second electrode on the second magnetic layer. The tunnel barrier structure may include a first tunnel barrier layer and a second tunnel barrier layer that are sequentially stacked on the first magnetic layer and may have different resistivity distributions from each other along a horizontal direction that may be parallel to the upper surface of the substrate.

公开(公告)号：US20200091412A1

公开(公告)日：2020-03-19

申请号：US16352957

申请日：2019-03-14

Applicant: SAMSUNG ELECTRONICS CO., LTD.

Inventor： Joonmyoung LEE ,  Yong Sung PARK ,  Jeong-Heon PARK ,  Hyun CHO ,  Ung Hwan PI

IPC: H01L43/02 ,  H01L43/10 ,  H01L43/12 ,  H01L27/22 ,  G11C14/00 ,  H01L21/67

Abstract: A magnetic memory device, a method for manufacturing a magnetic memory device, and a substrate treating apparatus, the device including a substrate including a first memory region and a second memory region; a first magnetic tunnel junction pattern on the first memory region, the first magnetic tunnel junction pattern including a first free pattern and a first oxide pattern on the first free pattern; and a second magnetic tunnel junction pattern on the second memory region, the second magnetic tunnel junction pattern including a second free pattern and a second oxide pattern on the second free pattern, wherein a ratio of a thickness of the first oxide pattern to a thickness of the first free pattern is different from a ratio of a thickness of the second oxide pattern to a thickness of the second free pattern.